MC908AP16CBE Freescale Semiconductor, MC908AP16CBE Datasheet - Page 267
![IC MCU 16K FLASH 8MHZ 42DIP](/photos/12/18/121836/mc908ap16cbe_sml.jpg)
MC908AP16CBE
Manufacturer Part Number
MC908AP16CBE
Description
IC MCU 16K FLASH 8MHZ 42DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Specifications of MC908AP16CBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
30
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Controller Family/series
HC08
No. Of I/o's
30
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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When DDRBx is a logic 1, reading address $0001 reads the PTBx data latch. When DDRBx is a logic 0,
reading address $0001 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Table 16-3
16.4 Port C
Port C is an 8-bit special-function port that shares one of its pins with the IRQ2, four of its pins with the
SPI module, and two of its pins with the IRSCI module.
16.4.1 Port C Data Register (PTC)
The port C data register contains a data latch for each of the eight port C pins.
Freescale Semiconductor
Alternative Function:
summarizes the operation of the port B pins.
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
DDRB
Bit
0
1
Address:
Reset:
Read:
Write:
READ DDRB ($0005)
WRITE DDRB ($0005)
WRITE PTB ($0001)
READ PTB ($0001)
PTB Bit
X
X
(1)
SCRxD
$0002
PTC7
Bit 7
Figure 16-9. Port C Data Register (PTC)
I/O Pin Mode
Input, Hi-Z
MC68HC908AP Family Data Sheet, Rev. 4
Table 16-3. Port B Pin Functions
RESET
Figure 16-8. Port B I/O Circuit
SCTxD
Output
PTC6
6
(2)
SPSCK
PTC5
5
Accesses to DDRB
DDRBx
PTBx
Read/Write
DDRB[7:0]
DDRB[7:0]
# PTB3–PTB0 are open-drain pins when configured as outputs.
PTB7–PTB4 have schmitt trigger inputs.
Unaffected by reset
PTC4
SS
4
PTC3
MOSI
3
PTB[7:0]
Read
Pin
Accesses to PTB
PTC2
MISO
2
PTB[7:0]
PTB[7:0]
PTC1
Write
1
PTBx
(3)
#
PTC0
IRQ2
Bit 0
Port C
265
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