MC908AP16CBE Freescale Semiconductor, MC908AP16CBE Datasheet - Page 264
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MC908AP16CBE
Manufacturer Part Number
MC908AP16CBE
Description
IC MCU 16K FLASH 8MHZ 42DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Specifications of MC908AP16CBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
30
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Controller Family/series
HC08
No. Of I/o's
30
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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Input/Output (I/O) Ports
DDRA[7:0] — Data Direction Register A Bits
Figure 16-4
When DDRAx is a logic 1, reading address $0000 reads the PTAx data latch. When DDRAx is a logic 0,
reading address $0000 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Table 16-2
262
These read/write bits control port A data direction. Reset clears DDRA[7:0], configuring all port A pins
as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
summarizes the operation of the port A pins.
shows the port A I/O logic.
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
DDRA
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Bit
0
1
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
PTA Bit
X
X
(1)
I/O Pin Mode
Input, Hi-Z
MC68HC908AP Family Data Sheet, Rev. 4
Table 16-2. Port A Pin Functions
RESET
Figure 16-4. Port A I/O Circuit
Output
(2)
Accesses to DDRA
NOTE
DDRAx
PTAx
Read/Write
DDRA[7:0]
DDRA[7:0]
PTA[7:0]
Read
Pin
Accesses to PTA
PTA[7:0]
PTA[7:0]
Write
Freescale Semiconductor
PTAx
(3)
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