MC908AP16CBE Freescale Semiconductor, MC908AP16CBE Datasheet - Page 144
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MC908AP16CBE
Manufacturer Part Number
MC908AP16CBE
Description
IC MCU 16K FLASH 8MHZ 42DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Specifications of MC908AP16CBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
30
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Controller Family/series
HC08
No. Of I/o's
30
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- Current page: 144 of 324
- Download datasheet (4Mb)
Timer Interface Module (TIM)
TOF — TIM Overflow Flag Bit
TOIE — TIM Overflow Interrupt Enable Bit
TSTOP — TIM Stop Bit
TRST — TIM Reset Bit
PS[2:0] — Prescaler Select Bits
144
This read/write flag is set when the TIM counter reaches the modulo value programmed in the TIM
counter modulo registers. Clear TOF by reading the TIM status and control register when TOF is set
and then writing a logic 0 to TOF. If another TIM overflow occurs before the clearing sequence is
complete, then writing logic 0 to TOF has no effect. Therefore, a TOF interrupt request cannot be lost
due to inadvertent clearing of TOF. Reset clears the TOF bit. Writing a logic 1 to TOF has no effect.
This read/write bit enables TIM overflow interrupts when the TOF bit becomes set. Reset clears the
TOIE bit.
This read/write bit stops the TIM counter. Counting resumes when TSTOP is cleared. Reset sets the
TSTOP bit, stopping the TIM counter until software clears the TSTOP bit.
Setting this write-only bit resets the TIM counter and the TIM prescaler. Setting TRST has no effect on
any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIM
counter is reset and always reads as logic 0. Reset clears the TRST bit.
These read/write bits select one of the seven prescaler outputs as the input to the TIM counter as
Table 9-2
1 = TIM counter has reached modulo value
0 = TIM counter has not reached modulo value
1 = TIM overflow interrupts enabled
0 = TIM overflow interrupts disabled
1 = TIM counter stopped
0 = TIM counter active
1 = Prescaler and TIM counter cleared
0 = No effect
shows. Reset clears the PS[2:0] bits.
Do not set the TSTOP bit before entering wait mode if the TIM is required
to exit wait mode.
Setting the TSTOP and TRST bits simultaneously stops the TIM counter at
a value of $0000.
PS2
0
0
0
0
1
1
1
1
PS1
0
0
1
1
0
0
1
1
MC68HC908AP Family Data Sheet, Rev. 4
Table 9-2. Prescaler Selection
PS0
0
1
0
1
0
1
0
1
NOTE
NOTE
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
TIM Clock Source
Not available
Freescale Semiconductor
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