C8051F715-GQ Silicon Laboratories Inc, C8051F715-GQ Datasheet - Page 184
![IC 8051 MCU 8K FLASH 48-TQFP](/photos/12/16/121648/c8051f715-gq_sml.jpg)
C8051F715-GQ
Manufacturer Part Number
C8051F715-GQ
Description
IC 8051 MCU 8K FLASH 48-TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F71xr
Specifications of C8051F715-GQ
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
48-TQFP, 48-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, WDT
Number Of I /o
39
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1635 - DEV KIT FOR C8051F700
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1619
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F715-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F715-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051F70x/71x
28.2.2. Assigning Port I/O Pins to Digital Functions
Any Port pins not assigned to analog functions may be assigned to digital functions or used as GPIO. Most
digital functions rely on the Crossbar for pin assignment; however, some digital functions bypass the
Crossbar in a manner similar to the analog functions listed above. Port pins used by these digital func-
tions and any Port pins selected for use as GPIO should have their corresponding bit in PnSKIP set
to 1. Table 28.2 shows all available digital functions and the potential mapping of Port I/O to each digital
function.
28.2.3. Assigning Port I/O Pins to External Event Trigger Functions
External event trigger functions can be used to trigger an interrupt or wake the device from a low power
mode when a transition occurs on a digital I/O pin. The event trigger functions do not require dedicated
pins and will function on both GPIO pins (PnSKIP = 1) and pins in use by the Crossbar (PnSKIP = 0).
External event trigger functions cannot be used on pins configured for analog I/O. Table 28.3 shows all
available external event trigger functions.
184
Digital Function
UART0, SPI0, SMBus, CP0,
CP0A, SYSCLK, PCA0
(CEX0-2 and ECI), T0 or T1.
Any pin used for GPIO
External Memory Interface
Event Trigger Function
External Interrupt 0
External Interrupt 1
Port Match
Table 28.3. Port I/O Assignment for External Event Trigger Functions
Table 28.2. Port I/O Assignment for Digital Functions
Any Port pin available for assignment by the
Crossbar. This includes P0.0–P2.7 pins which
have their PnSKIP bit set to 0.
Note: The Crossbar will always assign UART0
pins to P0.4 and P0.5.
Potentially Assignable Port Pins
Potentially Assignable Port Pins
Rev. 1.0
P0.0–P6.5
P3.0–P6.2
P0.0–P0.7
P0.0–P0.7
P0.0–P1.7
P0MASK, P0MAT
P1MASK, P1MAT
P0SKIP, P1SKIP,
SFR(s) used for
SFR(s) used for
Assignment
XBR0, XBR1
Assignment
EMI0CF
P2SKIP
IT01CF
IT01CF
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