MC9S08AC16CBE Freescale Semiconductor, MC9S08AC16CBE Datasheet - Page 102
![IC MCU 8BIT 16K FLASH 42SDIP](/photos/39/70/397054/pdip42_sml.jpg)
MC9S08AC16CBE
Manufacturer Part Number
MC9S08AC16CBE
Description
IC MCU 8BIT 16K FLASH 42SDIP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08AC16CBE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
Package
42SPDIP
Family Name
HCS08
Maximum Speed
40 MHz
On-chip Adc
8-chx10-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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Chapter 6 Parallel Input/Output
6.7.11
Port F parallel I/O function is controlled by the registers listed below.
102
Bits 7, 3 and 2 are reserved bits that must always be written to 0.
Bits 7, 3 and 2 are reserved bits that must always be written to 0.
PTFDDn
Reset
Reset
6:4, 1:0
6:4, 1:0
PTFDn
Field
Field
W
W
R
R
Port F I/O Registers (PTFD and PTFDD)
Port F Data Register Bits— For port F pins that are inputs, reads return the logic level on the pin. For port F
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port F pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTFD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pullups disabled.
Data Direction for Port F Bits — These read/write bits control the direction of port F pins and what is read for
PTFD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port F bit n and PTFD reads return the contents of PTFDn.
R
R
0
0
7
7
PTFDD6
PTFD6
0
0
6
6
Figure 6-36. Data Direction for Port F (PTFDD)
Table 6-27. PTFDD Register Field Descriptions
Table 6-26. PTFD Register Field Descriptions
Figure 6-35. Port F Data Register (PTFD)
PTFDD5
MC9S08AC16 Series Data Sheet, Rev. 8
PTFD5
0
0
5
5
PTFDD4
PTFD4
0
0
4
4
Description
Description
R
R
3
0
3
0
1
R
R
0
0
2
2
1
PTFDD1
Freescale Semiconductor
PTFD1
0
0
1
1
PTFDD0
PTFD0
0
0
0
0
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