C8051F819-GM Silicon Laboratories Inc, C8051F819-GM Datasheet - Page 240

• Manufacturer Part Number: C8051F819-GM
• Description: IC MCU 8BIT 8KB FLASH 20QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F81xr

Specifications of C8051F819-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-QFN
• Processor Series: C8051F8x
• Core: 8051
• Data Bus Width: 16 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F800DK
• Minimum Operating Temperature: - 55 C
• Package: 20QFN EP
• Device Core: 8051
• Family Name: C8051F8xx
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1799-5

C8051F80x-83x
SFR Definition 29.3. PCA0PWM: PCA0 PWM Configuration
SFR Address = 0xF7
240
Name
Reset
2:0 CLSEL[2:0] Cycle Length Select.
Bit
Type
7
6
5
4
3
Bit
Unused
ARSEL
EAR16
ECOV
COVF
Name
ARSEL
R/W
7
0
Auto-Reload Register Select.
This bit selects whether to read and write the normal PCA capture/compare registers
(PCA0CPn), or the Auto-Reload registers at the same SFR addresses. This function
is used to define the reload value for 9-bit through 15-bit PWM mode and 16-bit PWM
mode. In all other modes, the Auto-Reload registers have no function.
0: Read/Write Capture/Compare Registers at PCA0CPHn and PCA0CPLn.
1: Read/Write Auto-Reload Registers at PCA0CPHn and PCA0CPLn.
Cycle Overflow Interrupt Enable.
This bit sets the masking of the Cycle Overflow Flag (COVF) interrupt.
0: COVF will not generate PCA interrupts.
1: A PCA interrupt will be generated when COVF is set.
Cycle Overflow Flag.
This bit indicates an overflow of the nth bit (n= 9 through 15) of the main PCA counter
(PCA0). The specific bit used for this flag depends on the setting of the CLSEL bits.
The bit can be set by hardware or software, but must be cleared by software.
0: No overflow has occurred since the last time this bit was cleared.
1: An overflow has occurred since the last time this bit was cleared.
Read = 0b; Write = Don’t care.
16-Bit PWM Auto-Reload Enable.
This bit controls the Auto-Reload feature in 16-bit PWM mode, which loads the
PCA0CPn capture/compare registers with the values from the Auto-Reload registers
at the same SFR addresses on an overflow of the PCA counter (PCA0). This setting
affects all PCA channels that are configured to use 16-bit PWM mode.
0: 16-bit PWM mode Auto-Reload is disabled. This default setting is backwards-com-
patible with the 16-bit PWM mode available on other devices.
1: 16-bit PWM mode Auto-Reload is enabled.
When 16-bit PWM mode is not selected, these bits select the length of the PWM
cycle, from 8 to 15 bits. This affects all channels configured for PWM which are not
using 16-bit PWM mode. These bits are ignored for individual channels configured
to16-bit PWM mode.
000: 8 bits.
001: 9 bits.
010: 10 bits.
ECOV
R/W
6
0
COVF
R/W
5
0
Rev. 1.0
R
4
0
011: 11 bits.
100: 12 bits.
101: 13 bits.
Function
EAR16
R/W
3
0
2
0
110: 14 bits.
111: 15 bits.
CLSEL[1:0]
R/W
1
0
0
0