MC9S08QG8CDTER Freescale Semiconductor, MC9S08QG8CDTER Datasheet - Page 60
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MC9S08QG8CDTER
Manufacturer Part Number
MC9S08QG8CDTER
Description
IC MCU 8BIT 8K FLASH 16-TSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08QG8CDTER.pdf
(314 pages)
Specifications of MC9S08QG8CDTER
Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
512Byte
# I/os (max)
12
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Processor Series
S08QG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QG8E
Minimum Operating Temperature
- 40 C
Package
16TSSOP
Family Name
HCS08
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3 V
For Use With
DEMO9S08QG8E - BOARD DEMO FOR MC9S08QG8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Other names
MC9S08QG8CDTERTR
Available stocks
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Manufacturer
Quantity
Price
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Chapter 4 Memory Map and Register Definition
4.7.6
Only five command codes are recognized in normal user modes as shown in
Section 4.5.3, “Program and Erase Command
programming and erase operations.
All other command codes are illegal and generate an access error.
It is not necessary to perform a blank check command after a mass erase operation. The blank check
command is only required as part of the security unlocking mechanism.
58
FACCERR
FBLANK
Reset
Field
4
2
W
R
FLASH Command Register (FCMD)
Access Error Flag — FACCERR is set automatically when the proper command sequence is not obeyed exactly
(the erroneous command is ignored), if a program or erase operation is attempted before the FCDIV register has
been initialized, or if the MCU enters stop while a command was in progress. For a more detailed discussion of
the exact actions that are considered access errors, see
writing a 1 to FACCERR. Writing a 0 to FACCERR has no meaning or effect.
0 No access error.
1 An access error has occurred.
FLASH Verified as All Blank (erased) Flag — FBLANK is set automatically at the conclusion of a blank check
command if the entire FLASH array was verified to be erased. FBLANK is cleared by clearing FCBEF to write a
new valid command. Writing to FBLANK has no meaning or effect.
0 After a blank check command is completed and FCCF = 1, FBLANK = 0 indicates the FLASH array is not
1 After a blank check command is completed and FCCF = 1, FBLANK = 1 indicates the FLASH array is
0
0
7
completely erased.
completely erased (all 0xFF).
Page erase (512 bytes/page)
Byte program — burst mode
Table 4-12. FSTAT Register Field Descriptions (continued)
Mass erase (all FLASH)
0
0
6
Figure 4-10. FLASH Command Register (FCMD)
Byte program
Blank check
Command
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Table 4-13. FLASH Commands
0
0
5
Execution,” for a detailed discussion of FLASH
0
0
4
FCMD
Description
0x05
0x20
0x25
0x40
0x41
FCMD
Section 4.5.5, “Access
3
0
0
Equate File Label
mPageErase
mMassErase
mBurstProg
mByteProg
mBlank
0
0
2
Table
Errors.” FACCERR is cleared by
4-13. Refer to
Freescale Semiconductor
0
0
1
0
0
0
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