MC9S08QG8CDTER Freescale Semiconductor, MC9S08QG8CDTER Datasheet - Page 13
MC9S08QG8CDTER
Manufacturer Part Number
MC9S08QG8CDTER
Description
IC MCU 8BIT 8K FLASH 16-TSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08QG8CDTER.pdf
(314 pages)
Specifications of MC9S08QG8CDTER
Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
512Byte
# I/os (max)
12
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Processor Series
S08QG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QG8E
Minimum Operating Temperature
- 40 C
Package
16TSSOP
Family Name
HCS08
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3 V
For Use With
DEMO9S08QG8E - BOARD DEMO FOR MC9S08QG8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Other names
MC9S08QG8CDTERTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Section Number
6.1
6.2
6.3
6.4
7.1
7.2
7.3
7.4
7.5
8.1
Freescale Semiconductor
Port Data and Data Direction .......................................................................................................... 77
Pin Control — Pullup, Slew Rate, and Drive Strength ................................................................... 78
Pin Behavior in Stop Modes............................................................................................................ 79
Parallel I/O Registers ...................................................................................................................... 79
Introduction ..................................................................................................................................... 87
Programmer’s Model and CPU Registers ....................................................................................... 88
Addressing Modes........................................................................................................................... 91
Special Operations........................................................................................................................... 93
HCS08 Instruction Set Summary .................................................................................................... 96
Introduction ................................................................................................................................... 107
6.4.1 Port A Registers .................................................................................................................79
6.4.2 Port A Control Registers....................................................................................................80
6.4.3 Port B Registers .................................................................................................................83
6.4.4 Port B Control Registers ....................................................................................................84
7.1.1 Features ..............................................................................................................................87
7.2.1 Accumulator (A) ................................................................................................................88
7.2.2 Index Register (H:X) .........................................................................................................88
7.2.3 Stack Pointer (SP) ..............................................................................................................89
7.2.4 Program Counter (PC) .......................................................................................................89
7.2.5 Condition Code Register (CCR) ........................................................................................89
7.3.1 Inherent Addressing Mode (INH)......................................................................................91
7.3.2 Relative Addressing Mode (REL) .....................................................................................91
7.3.3 Immediate Addressing Mode (IMM).................................................................................91
7.3.4 Direct Addressing Mode (DIR) .........................................................................................91
7.3.5 Extended Addressing Mode (EXT) ...................................................................................92
7.3.6 Indexed Addressing Mode .................................................................................................92
7.4.1 Reset Sequence ..................................................................................................................93
7.4.2 Interrupt Sequence .............................................................................................................93
7.4.3 Wait Mode Operation.........................................................................................................94
7.4.4 Stop Mode Operation.........................................................................................................94
7.4.5 BGND Instruction..............................................................................................................95
8.1.1 ACMP Configuration Information...................................................................................107
8.1.2 ACMP/TPM Configuration Information .........................................................................107
8.1.3 Features ............................................................................................................................109
Central Processor Unit (S08CPUV2)
Analog Comparator (S08ACMPV2)
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Parallel Input/Output Control
Chapter 6
Chapter 7
Chapter 8
Title
Page
11