EZ80F91NA050EG Zilog, EZ80F91NA050EG Datasheet - Page 240
EZ80F91NA050EG
Manufacturer Part Number
EZ80F91NA050EG
Description
IC ACCLAIM MCU 256KB 144-BGA
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F91NA050EG
Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LBGA
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
- 40 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3869
EZ80F91NA050EG
EZ80F91NA050EG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Zilog Debug Interface
PS019215-0910
Introduction
The Zilog Debug Interface (ZDI) provides a built-in debugging interface to the CPU. ZDI
provides basic in-circuit emulation features including:
•
•
•
•
•
•
•
•
•
The above features are built into the silicon. Control is provided via a two-wire interface
that is connected to the USB Smart Cable emulator.
using a a target board, USB Smart Cable, and the host PC running Zilog Developer Studio
II. For more information on USB Smart Cable and ZDS II, refer to www.zilog.com.
Examining and modifying internal registers.
Examining and modifying memory.
Starting and stopping the user program.
Setting program and data break points.
Single-stepping the user program.
Executing user-supplied instructions.
Debugging the final product with the inclusion of one small connector.
Downloading code into SRAM.
C source-level debugging using Zilog Developer Studio II (ZDS II).
Developer
Studio
Zilog
Figure 48. Typical ZDI Debug Setup
USB Smart
Emulator
Cable
Figure 48
C
O
N
N
C
O
R
E
T
Target Board
displays a typical setup
Product Specification
Zilog Debug Interface
Product
eZ80®
eZ80F91 MCU
231
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