ST72F321J9T6 STMicroelectronics, ST72F321J9T6 Datasheet - Page 126

MCU 8BIT 60KB FLASH 44TQFP

ST72F321J9T6

Manufacturer Part Number
ST72F321J9T6
Description
MCU 8BIT 60KB FLASH 44TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F321J9T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
2048 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
5
Operating Supply Voltage
3.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7F521-IND/USB, ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20-DVP3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-4844

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72F321J9T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
ST72321Rx ST72321ARx ST72321Jx
I
I
Read / Write
Reset Value: 0000 0000 (00h)
7-bit Addressing Mode
Bit 7:1 = ADD[7:1] Interface address.
These bits define the I
face. They are not cleared when the interface is
disabled (PE=0).
Bit 0 = ADD0 Address direction bit.
This bit is don’t care, the interface acknowledges
either 0 or 1. It is not cleared when the interface is
disabled (PE=0).
Note: Address 01h is always ignored.
10-bit Addressing Mode
Bit 7:0 = ADD[7:0] Interface address.
These are the least significant bits of the I
address of the interface. They are not cleared
when the interface is disabled (PE=0).
126/193
2
2
ADD7 ADD6 ADD5 ADD4 ADD3 ADD2 ADD1 ADD0
C BUS INTERFACE (Cont’d)
C OWN ADDRESS REGISTER (OAR1)
7
2
C bus address of the inter-
2
C bus
0
I
Read / Write
Reset Value: 0100 0000 (40h)
Bit 7:6 = FR[1:0] Frequency bits.
These bits are set by software only when the inter-
face is disabled (PE=0). To configure the interface
to I
sponding to the microcontroller frequency F
Bit 5:3 = Reserved
Bit 2:1 = ADD[9:8] Interface address.
These are the most significant bits of the I
address of the interface (10-bit mode only). They
are not cleared when the interface is disabled
(PE=0).
Bit 0 = Reserved.
2
FR1
C OWN ADDRESS REGISTER (OAR2)
7
2
C specified delays select the value corre-
FR0
6 to 8 MHz
< 6 MHz
f
CPU
0
0
0
FR1
0
0
ADD9 ADD8
FR0
2
CPU
0
1
C bus
0
0
.

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