ST72F260G1M6 STMicroelectronics, ST72F260G1M6 Datasheet - Page 13

MCU 8BIT 4K FLASH ICP 28SOIC

ST72F260G1M6

Manufacturer Part Number
ST72F260G1M6
Description
MCU 8BIT 4K FLASH ICP 28SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F260G1M6

Core Processor
ST7
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Data Converters
A/D 6x10b
Processor Series
ST72F2x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7F264-IND/USB, ST72F34X-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
ST7
No. Of I/o's
22
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-4840

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72F260G1M6
Manufacturer:
ST
0
Part Number:
ST72F260G1M6/TR
Manufacturer:
ST
0
ST72260Gx, ST72262Gx, ST72264Gx
Legend: x=Undefined, R/W=Read/Write
Notes:
1. The contents of the I/O port DR registers are readable only in output configuration. In input configura-
tion, the values of the I/O pins are returned instead of the DR register contents.
2. The bits associated with unavailable pins must always keep their reset value.
3. For compatibility with the ST72C254, the ADCDRL and ADCDRH data registers are located with the
LSB on the lower address (6Fh) and the MSB on the higher address (70h). As this scheme is not little En-
dian, the ADC data registers cannot be treated by C programs as an integer, but have to be treated as two
char registers.
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