STM32F100VBT6B STMicroelectronics, STM32F100VBT6B Datasheet - Page 55

MCU 32BIT 128K FLASH 100LQFP

STM32F100VBT6B

Manufacturer Part Number
STM32F100VBT6B
Description
MCU 32BIT 128K FLASH 100LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32F100VBT6B

Featured Product
STM32 Value Line
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
24MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
80
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
STM32F100x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
80
Number Of Timers
6
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
STM32100B-EVAL
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
On-chip Dac
12 bit, 2 Channel
For Use With
STM32100B-EVAL - EVAL BOARD FOR STM32F100VBT6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-10659
STM32F100VBT6B

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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
5.3.12
Table 33.
1. FT = 5V tolerant. To sustain a voltage higher than V
2. Hysteresis voltage between Schmitt trigger switching levels. Guaranteed by design, not tested in production.
3. With a minimum of 100 mV.
4. Leakage could be higher than max. if negative current is injected on adjacent pins.
5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This
Symbol
V
R
R
C
V
V
I
PMOS/NMOS contribution
lkg
hys
PU
PD
IH
IO
IL
Standard I/O input low level voltage
I/O FT
Standard I/O input high level voltage
I/O FT
Standard I/O Schmitt trigger voltage
hysteresis
I/O FT Schmitt trigger voltage
hysteresis
Input leakage current
Weak pull-up equivalent resistor
Weak pull-down equivalent
resistor
I/O pin capacitance
I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in
performed under the conditions summarized in
compliant.
I/O static characteristics
All I/Os are CMOS and TTL compliant (no software configuration required). Their
characteristics cover more than the strict CMOS-technology or TTL parameters. The
coverage of these requirements is shown in
in
(1)
(1)
Figure 24
(5)
input low level voltage
input high level voltage
(2)
(2)
Parameter
to the series resistance is minimum
and
(4)
Figure 25
(5)
for 5 V tolerant I/Os.
Doc ID 16455 Rev 5
V
Standard I/Os
DD
SS
Conditions
V
V
+0.5 the internal pull-up/pull-down resistors must be disabled.
V
I/O FT
IN
IN
IN
V

(~10% order)

= 5 V
IN
V
V
SS
DD
V
DD
Figure 22
Table
.
0.41 (V
0.42 (V
5% V
–0.5
+1.3
–0.5
Table 33
Min
200
+1
30
30
8. All I/Os are CMOS and TTL
DD
and
DD
DD
(3)
–2)
–2)
Figure 23
are derived from tests
Typ
40
40
5
Electrical characteristics
for standard I/Os, and
0.28 (V
0.32 (V
V
+0.75
DD
+0.8
Max
5.5
1
50
50
3
+0.5
DD
DD
–2)
–2)
55/86
Unit
mV
mV
µA
k
k
pF
V

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