LPC2364FBD100,551 NXP Semiconductors, LPC2364FBD100,551 Datasheet - Page 25

IC ARM7 MCU FLASH 128K 100LQFP

LPC2364FBD100,551

Manufacturer Part Number
LPC2364FBD100,551
Description
IC ARM7 MCU FLASH 128K 100LQFP
Manufacturer
NXP Semiconductors
Series
LPC2300r
Datasheet

Specifications of LPC2364FBD100,551

Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
100-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, Ethernet, I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
70
Ram Size
34K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC23
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
34 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA100
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
100LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1022 - BOARD SCKT ADAPTER FOR TFBGA100568-4310 - EVAL BOARD LPC2158 W/LCDMCB2360UME - BOARD EVAL MCB2360 + ULINK-MEMCB2360U - BOARD EVAL MCB2360 + ULINK2622-1019 - BOARD FOR LPC2106 48-LQFP568-4014 - BOARD EVAL FOR LPC236X ARM568-3999 - BOARD EVAL FOR LPC23 ARM MCU622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-3995
935282463551
LPC2364FBD100-S

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NXP Semiconductors
LPC2364_65_66_67_68_6
Product data sheet
7.16.1 Features
7.17.1 Features
7.16 SSP serial I/O controller
7.17 SD/MMC card interface (LPC2367/68 only)
7.18 I
The LPC2364/65/66/67/68 each contain two SSP controllers. The SSP controller is
capable of operation on a SPI, 4-wire SSI, or Microwire bus. It can interact with multiple
masters and slaves on the bus. Only a single master and a single slave can communicate
on the bus during a given data transfer. The SSP supports full duplex transfers, with
frames of 4 bits to 16 bits of data flowing from the master to the slave and from the slave
to the master. In practice, often only one of these data flows carries meaningful data.
The Secure Digital and Multimedia Card Interface (MCI) allows access to external SD
memory cards. The SD card interface conforms to the SD Multimedia Card Specification
Version 2.11.
The LPC2364/65/66/67/68 each contain three I
The I
(SCL), and a serial data line (SDA). Each device is recognized by a unique address and
can operate as either a receiver-only device (e.g., an LCD driver) or a transmitter with the
capability to both receive and send information (such as memory). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I
controlled by more than one bus master connected to it.
The I
(Fast I
2
C-bus serial I/O controllers
Compatible with Motorola SPI, 4-wire Texas Instruments SSI, and National
Semiconductor Microwire buses
Synchronous serial communication
Master or slave operation
8-frame FIFOs for both transmit and receive
4-bit to 16-bit frame
DMA transfers supported by GPDMA
The MCI interface provides all functions specific to the SD/MMC memory card. These
include the clock generation unit, power management control, and command and data
transfer.
Conforms to Multimedia Card Specification v2.11.
Conforms to Secure Digital Memory Card Physical Layer Specification, v0.96.
Can be used as a multimedia card bus or a secure digital memory card bus host. The
SD/MMC can be connected to several multimedia cards or a single secure digital
memory card.
DMA supported through the GPDMA controller.
2
2
C-bus is bidirectional, for inter-IC control using only two wires: a serial clock line
C-bus implemented in LPC2364/65/66/67/68 supports bit rates up to 400 kbit/s
2
C-bus).
Rev. 06 — 1 February 2010
LPC2364/65/66/67/68
Single-chip 16-bit/32-bit microcontrollers
2
C-bus controllers.
2
C is a multi-master bus, it can be
© NXP B.V. 2010. All rights reserved.
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