LPC2364FBD100,551 NXP Semiconductors, LPC2364FBD100,551 Datasheet - Page 2

IC ARM7 MCU FLASH 128K 100LQFP

LPC2364FBD100,551

Manufacturer Part Number
LPC2364FBD100,551
Description
IC ARM7 MCU FLASH 128K 100LQFP
Manufacturer
NXP Semiconductors
Series
LPC2300r
Datasheet

Specifications of LPC2364FBD100,551

Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
100-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, Ethernet, I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
70
Ram Size
34K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC23
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
34 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA100
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
100LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1022 - BOARD SCKT ADAPTER FOR TFBGA100568-4310 - EVAL BOARD LPC2158 W/LCDMCB2360UME - BOARD EVAL MCB2360 + ULINK-MEMCB2360U - BOARD EVAL MCB2360 + ULINK2622-1019 - BOARD FOR LPC2106 48-LQFP568-4014 - BOARD EVAL FOR LPC236X ARM568-3999 - BOARD EVAL FOR LPC23 ARM MCU622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-3995
935282463551
LPC2364FBD100-S

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NXP Semiconductors
LPC2364_65_66_67_68_6
Product data sheet
Serial interfaces:
Other peripherals:
Standard ARM test/debug interface for compatibility with existing tools.
Emulation trace module supports real-time trace.
Single 3.3 V power supply (3.0 V to 3.6 V).
Four reduced power modes: idle, sleep, power-down, and deep power-down.
Four external interrupt inputs configurable as edge/level sensitive. All pins on Port 0
and Port 2 can be used as edge sensitive interrupt sources.
Processor wake-up from Power-down mode via any interrupt able to operate during
Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet
wake-up interrupt).
Two independent power domains allow fine tuning of power consumption based on
needed features.
Each peripheral has its own clock divider for further power saving.
Brownout detect with separate thresholds for interrupt and forced reset.
On-chip power-on reset.
On-chip crystal oscillator with an operating range of 1 MHz to 24 MHz.
4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as
the system clock. When used as the CPU clock, does not allow CAN and USB to run.
Ethernet MAC with associated DMA controller. These functions reside on an
independent AHB.
USB 2.0 full-speed device with on-chip PHY and associated DMA controller
(LPC2364/66/68 only).
Four UARTs with fractional baud rate generation, one with modem control I/O, one
with IrDA support, all with FIFO.
CAN controller with two channels (LPC2364/66/68 only).
SPI controller.
Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate
for the SPI port, sharing its interrupt and pins. These can be used with the GPDMA
controller.
Three I
I
the GPDMA.
SD/MMC memory card interface (LPC2367/68 only).
70 general purpose I/O pins with configurable pull-up/down resistors.
10-bit ADC with input multiplexing among 6 pins.
10-bit DAC.
Four general purpose timers/counters with a total of 8 capture inputs and 10
compare outputs. Each timer block has an external count input.
One PWM/timer block with support for three-phase motor control. The PWM has
two external count inputs.
Real-Time Clock (RTC) with separate power pin, clock source can be the RTC
oscillator or the APB clock.
2 kB SRAM powered from the RTC power pin, allowing data to be stored when the
rest of the chip is powered off.
WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator,
the RTC oscillator, or the APB clock.
2
S (Inter-IC Sound) interface for digital audio input or output. It can be used with
2
C-bus interfaces (one with open-drain and two with standard port pins).
Rev. 06 — 1 February 2010
LPC2364/65/66/67/68
Single-chip 16-bit/32-bit microcontrollers
© NXP B.V. 2010. All rights reserved.
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