P89LPC932A1FDH,529 NXP Semiconductors, P89LPC932A1FDH,529 Datasheet - Page 16

• Manufacturer Part Number: P89LPC932A1FDH,529
• Description: IC 80C51 MCU FLASH 8K 28-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC932A1FDH,529

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSSOP
• For Use With: OM6292 - DEMO BOARD PCA2125 RTCDB-TSSOP-LPC932 - BOARD FOR LPC932 TSSOP622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9622-1003 - KIT FOR LCD DEMO568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: 568-1286-5; 935276132529; P89LPC932A1FDH-S

Table 3.
* indicates SFRs that are bit addressable.
[1]
[2]
[3]
[4]
[5]
[6]
Name
TISE2
TL0
TL1
TL2
TMOD
TOR2H
TOR2L
TPCR2H
TPCR2L
TRIM
WDCON
WDL
WFEED1
WFEED2
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.
All ports are in input only (high-impedance) state after power-up.
The RSTSRC register reflects the cause of the P89LPC932A1 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset value is
xx11 0000.
The only reset source that affects these SFRs is power-on reset.
On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
After reset, the value is 1110 01x1, i.e., PRE2 to PRE0 are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.
Other resets will not affect WDTOF.
Special function registers
Description
CCU interrupt status encode
register
Timer 0 low
Timer 1 low
CCU timer low
Timer 0 and 1 mode
CCU reload register high
CCU reload register low
Prescaler control register
high
Prescaler control register low
Internal oscillator trim register
Watchdog control register
Watchdog load
Watchdog feed 1
Watchdog feed 2
…continued
SFR
addr.
DEH
CCH
CEH
CBH
CAH TPCR2L.
8AH
8BH
CFH
A7H
C1H
C2H
C3H
89H
96H
Bit functions and addresses
T1GATE
RCCLK
PRE2
MSB
7
-
-
TPCR2L.
ENCLK
T1C/T
PRE1
6
-
-
TPCR2L.
TRIM.5
T1M1
PRE0
5
-
-
TPCR2L.
TRIM.4
T1M0
4
-
-
-
TPCR2L.
T0GATE
TRIM.3
3
-
-
-
TPCR2L.
ENCINT.
WDRUN
TRIM.2
T0C/T
2
2
-
TPCR2H.
TPCR2L.
ENCINT.
WDTOF
TRIM.1
T0M1
1
1
1
TPCR2H.
TPCR2L.
ENCINT.
WDCLK
TRIM.0
T0M0
LSB
0
0
0
Reset value
Hex
00
00
00
00
00
00
00
00
00
FF
[5] [4]
[6] [4]
Binary
xxxx x000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xx00
0000 0000
1111 1111