AT91SAM9G45-CU Atmel, AT91SAM9G45-CU Datasheet - Page 10

• Manufacturer Part Number: AT91SAM9G45-CU
• Description: MCU ARM9 324-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G45-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 400MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: ROM
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 1.1 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 324-TFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 800 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: AT91
• No. Of I/o's: 160
• Ram Memory Size: 64KB
• Cpu Speed: 400MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: AT91SAM9G45-EKES - KIT EVAL FOR AT91SAM9G45
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 3-1.
Notes:
10
Signal Name
AD3Y
GPAD4-GPAD7
TSADTRG
TSADVREF
M
1. Refer to peripheral multiplexing tables in
2. When configured as an input, the NRST pin enables asynchronous reset of the device when asserted low. This allows con-
3. Programming of this pull-up resistor is performed independently for each I/O line through the PIO Controllers. After reset, all
AT91SAM9G45
nection of a simple push button on the NRST pin as a system-user reset.
the I/O lines default as inputs with pull-up resistors enabled, except those which are multiplexed with the External Bus Inter-
face signals that require to be enabled as Peripheral at reset. This is explicitly indicated in the column “Reset State” of the
peripheral multiplexing tables.
Signal Description List (Continued)
Analog input channel 3 or
Touch Screen Left channel
Analog Inputs
ADC Trigger
ADC Reference
Function
Section 9.4 “Peripheral Signals Multiplexing on I/O Lines”
Analog
Analog
Input
Analog
Type
Active
Level
Reference
VDDANA
VDDANA
VDDANA
VDDANA
Voltage
Comments
Multiplexed with AD3
for these signals.
6438ES–ATARM–21-Jun-10