AT91SAM7XC256B-AU Atmel, AT91SAM7XC256B-AU Datasheet - Page 20
![MCU ARM 256K HS FLASH 100-LQFP](/photos/6/76/67646/313-100-lqfp_sml.jpg)
AT91SAM7XC256B-AU
Manufacturer Part Number
AT91SAM7XC256B-AU
Description
MCU ARM 256K HS FLASH 100-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7XC128B-CU.pdf
(47 pages)
Specifications of AT91SAM7XC256B-AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
Operating Supply Voltage
1.8 V
Data Bus Width
32 Bit
Number Of Programmable I/os
62
Interface Type
CAN/Ethernet/SPI/TWI/USART/USB
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
91S
Core
ARM7TDMI
Data Ram Size
64 KB
Maximum Clock Frequency
55 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7XC256B-AU
Manufacturer:
WESTCODE
Quantity:
103
Company:
Part Number:
AT91SAM7XC256B-AU
Manufacturer:
ATMEL
Quantity:
899
8.4
8.4.1
8.4.2
8.4.3
20
Memory Mapping
AT91SAM7XC512/256/128 Preliminary
Internal RAM
Internal ROM
Internal Flash
After reset and until the Remap Command is performed, the SRAM is only accessible at address
0x0020 0000. After Remap, the SRAM also becomes available at address 0x0.
The AT91SAM7XC512/256/128 embeds an Internal ROM. At any time, the ROM is mapped at
address 0x30 0000. The ROM contains the FFPI and the SAM-BA program.
At any time, the Flash is mapped to address 0x0010 0000. It is also accessible at address 0x0
after the reset, if GPNVM bit 2 is set and before the Remap Command.
A general purpose NVM (GPNVM) bit is used to boot either on the ROM (default) or from the
Flash.
This GPNVM bit can be cleared or set respectively through the commands “Clear General-pur-
pose NVM Bit” and “Set General-purpose NVM Bit” of the EFC User Interface.
Setting the GPNVM Bit 2 selects the boot from the Flash. Asserting ERASE clears the GPNVM
Bit 2 and thus selects the boot from the ROM by default.
Figure 8-2.
• The AT91SAM7XC512 embeds a high-speed 128-Kbyte SRAM bank.
• The AT91SAM7XC256 embeds a high-speed 64-Kbyte SRAM bank.
• The AT91SAM7XC128 embeds a high-speed 32-Kbyte SRAM bank.
• The AT91SAM7XC512 features two banks (dual plane) of 256 Kbytes of Flash.
• The AT91SAM7XC256 features one bank (single plane) of 256 Kbytes of Flash.
• The AT91SAM7XC128 features one bank (single plane) of 128 Kbytes of Flash.
256M Bytes
Internal Memory Mapping with GPNVM Bit 2 = 0 (default)
0x0000 0000
0x0010 0000
0x0020 0000
0x0030 0000
0x000F FFFF
0x001F FFFF
0x002F FFFF
0x0FFF FFFF
0x0040 0000
0x003F FFFF
ROM Before Remap
SRAM After Remap
Undefined Areas
Internal FLASH
Internal SRAM
Internal ROM
(Abort)
252 M Bytes
1 M Bytes
1 M Bytes
1 M Bytes
1 M Bytes
6209DS–ATARM–17-Feb-09