AT91SAM7L128-CU Atmel, AT91SAM7L128-CU Datasheet - Page 470
![MCU ARM7 128K HS FLASH 144-LFBGA](/photos/12/13/121356/144-lfbga_sml.jpg)
AT91SAM7L128-CU
Manufacturer Part Number
AT91SAM7L128-CU
Description
MCU ARM7 128K HS FLASH 144-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7L64-CU.pdf
(564 pages)
Specifications of AT91SAM7L128-CU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
36MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.55 V ~ 1.8 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
6 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
80
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7L128-CU
Manufacturer:
Atmel
Quantity:
2 660
- Current page: 470 of 564
- Download datasheet (9Mb)
32.6.9
Register Name:
Access Type:
• CPRE: Channel Pre-scaler
• CALG: Channel Alignment
0 = The period is left aligned.
1 = The period is center aligned.
• CPOL: Channel Polarity
0 = The output waveform starts at a low level.
1 = The output waveform starts at a high level.
• CPD: Channel Update Period
0 = Writing to the PWM_CUPDx will modify the duty cycle at the next period start event.
1 = Writing to the PWM_CUPDx will modify the period at the next period start event.
470
0
0
0
0
0
0
0
0
1
1
1
1
1
31
23
15
–
–
–
7
–
AT91SAM7L128/64 Preliminary
PWM Channel Mode Register
0
0
0
0
1
1
1
1
0
0
0
0
1
30
22
14
–
–
–
6
–
PWM_CMR[0..3]
Read/Write
CPRE
Other
0
0
1
1
0
0
1
1
0
0
1
1
0
29
21
13
–
–
–
5
–
0
1
0
1
0
1
0
1
0
1
0
1
0
28
20
12
–
–
–
4
–
MCK
MCK/2
MCK/4
MCK/8
MCK/16
MCK/32
MCK/64
MCK/128
MCK/256
MCK/512
MCK/1024
CLKA
CLKB
Reserved
27
19
11
–
–
–
3
Channel Pre-scaler
CPD
26
18
10
–
–
2
CPRE
CPOL
25
17
–
–
9
1
6257A–ATARM–20-Feb-08
CALG
24
16
–
–
8
0
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