AT91SAM7L128-CU Atmel, AT91SAM7L128-CU Datasheet - Page 116

• Manufacturer Part Number: AT91SAM7L128-CU
• Description: MCU ARM7 128K HS FLASH 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7L128-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 36MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.55 V ~ 1.8 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Figure 17-8. Wake Up Sources
17.3.7.1
17.3.7.2
116
WKUP15
WKUP0
WKUP1
FWUP
AT91SAM7L128/64 Preliminary
Force Wake Up
Wake Up Inputs
brown_out
rtc_alarm
Falling/Rising
Falling/Rising
Falling/Rising
Falling/Rising
WKUPT15
WKUPT0
WKUPT1
Detector
Detector
Detector
Detector
Edge
Edge
Edge
Edge
The Force Wake Up pin, FWUP is used to start up the backup power supply, as described in the
previous paragraphs. Then, when supply_on is asserted by the Supply Controller, the FWUP
can be used as a wake up source with a programmable debouncing period.
The FWUP pin is enabled as a wake up source by writing the FWUPEN bit to 1 in the Supply
Controller Wake Up Mode Register, SUPC_WUMR. Then, the FWUPDBC field in the same reg-
ister selects the debouncing period, which can be selected between 3, 32, 512, 4,096 or 32,768
slow clock cycles. This corresponds respectively to about 100 µs, about 1 ms, about 16 ms,
about 128 ms and about 1 second (for a typical slow clock frequency of 32 kHz). Programming
FWUPDBC to 0x0 selects an immediate wake up, i.e., the FWUP must be low during a minimum
of one slow clock period to wake up the core power supply.
If the FWUP pin is asserted for a time longer than the debouncing period, a wake up of the core
power supply is started and the FWUP bit in the Supply Controller Status Register, SUPC_SR, is
set and remains high until the register is read.
The wake up inputs, WKUP0 to WKUP15, can be programmed to perform a wake up of the core
power supply. Each input can be enabled by writing to 1 the corresponding bit, WKUPEN0 to
WKUPEN 15, in the Wake Up Inputs Register, SUPC_WUIR. The wake up level can be selected
with the corresponding polarity bit, WKUPPL0 to WKUPPL15, also located in SUPC_WUIR.
BODEN
RTCEN
WKUPEN15
WKUPEN0
WKUPEN1
FWUPEN
WKUPIS0
WKUPIS1
WKUPIS15
SLCK
SLCK
WKUPDBC
FWUPDBC
Debouncer
Debouncer
WKUPS
FWUP
6257A–ATARM–20-Feb-08
Core
Supply
Restart