ATXMEGA256A3-MH Atmel, ATXMEGA256A3-MH Datasheet - Page 3
![MCU AVR 256K FLASH 1.8V 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATXMEGA256A3-MH
Manufacturer Part Number
ATXMEGA256A3-MH
Description
MCU AVR 256K FLASH 1.8V 64-QFN
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheet
1.ATXMEGA64A3-MH.pdf
(134 pages)
Specifications of ATXMEGA256A3-MH
Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATXMEGA256x
Core
AVR8
Data Bus Width
8 bit, 16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
1.6 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 2 Channel
On-chip Dac
2 bit, 1 Channel
Package
64QFN EP
Device Core
AVR
Family Name
XMEGA
Maximum Speed
32 MHz
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATXMEGA256A3-MU
ATXMEGA256A3-MU
ATXMEGA256A3-MU
2. Pinout/Block Diagram
Figure 2-1.
Notes:
8068T–AVR–12/10
INDEX CORNER
1. For full details on pinout and alternate pin functions refer to
2. The large center pad underneath the QFN/MLF package should be soldered to ground on the board to ensure good
mechanical stability.
Block diagram and pinout.
GND
VCC
PC0
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PA3
PA4
PA5
PA6
PA7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
ADC A
ADC B
DAC B
AC A0
AC A1
AC B0
AC B1
Port C
Watchdog
OSC/CLK
Port R
Control
Control
Control
Power
Reset
EVENT ROUTING NETWORK
”Pinout and Pin Functions” on page
Port D
TEMP
BOD
Interrupt Controller
DATA BU S
DATA BU S
Event System ctrl
DMA
CPU
Port E
VREF
RTC
E
FLASH
2
RAM
PROM
POR
OCD
Port F
49.
XMEGA A3
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
PF2
PF1
PF0
VCC
GND
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
VCC
GND
PD7
3