PIC18LF6621-I/PT Microchip Technology, PIC18LF6621-I/PT Datasheet - Page 183
![IC PIC MCU FLASH 32KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18LF6621-I/PT
Manufacturer Part Number
PIC18LF6621-I/PT
Description
IC PIC MCU FLASH 32KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F6525-IPT.pdf
(396 pages)
3.PIC18F6525-IPT.pdf
(8 pages)
Specifications of PIC18LF6621-I/PT
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
53
Eeprom Memory Size
1024Byte
Ram Memory Size
3.75KB
Cpu Speed
40MHz
No. Of Timers
5
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
MSSP, SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF6621-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 183 of 396
- Download datasheet (8Mb)
18.3.8
In Master mode, all module clocks are halted and the
transmission/reception will remain in that state until the
device wakes from Sleep. After the device returns to
normal mode, the module will continue to transmit/
receive data.
In Slave mode, the SPI Transmit/Receive Shift register
operates asynchronously to the device. This allows the
device to be placed in Sleep mode and data to be
shifted into the SPI Transmit/Receive Shift register.
When all 8 bits have been received, the MSSP interrupt
flag bit will be set and if enabled, will wake the device
from Sleep.
18.3.9
A Reset disables the MSSP module and terminates the
current transfer.
TABLE 18-2:
2005 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
TRISC
TRISF
SSPBUF
SSPCON1
SSPSTAT
Legend:
Note 1:
Name
x = unknown, u = unchanged, — = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP in SPI™ mode.
Enabled only in Microcontroller mode for PIC18F8525/8621 devices.
SLEEP OPERATION
EFFECTS OF A RESET
PORTC Data Direction Register
MSSP Receive Buffer/Transmit Register
GIE/GIEH PEIE/GIEL TMR0IE
PSPIF
PSPIE
PSPIP
TRISF7
WCOL
Bit 7
SMP
REGISTERS ASSOCIATED WITH SPI™ OPERATION
(1)
(1)
(1)
TRISF6
SSPOV
ADIE
ADIP
Bit 6
ADIF
CKE
TRISF5
SSPEN
RC1IE
RC1IP
RC1IF
Bit 5
D/A
PIC18F6525/6621/8525/8621
TRISF4
INT0IE
TX1IE
TX1IP
TX1IF
Bit 4
CKP
P
TRISF3
SSPM3
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
S
18.3.10
Table 18-1 shows the compatibility between the
standard SPI modes and the states of the CKP and
CKE control bits.
TABLE 18-1:
There is also a SMP bit which controls when the data is
sampled.
Standard SPI Mode
TMR0IF
CCP1IE
CCP1IP
CCP1IF
TRISF2
SSPM2
Bit 2
R/W
Terminology
0, 0
0, 1
1, 0
1, 1
BUS MODE COMPATIBILITY
TMR2IE
TMR2IP
TMR2IF
TRISF1
SSPM1
INT0IF
Bit 1
UA
SPI™ BUS MODES
TMR1IE 0000 0000 0000 0000
TMR1IP 1111 1111 1111 1111
TMR1IF 0000 0000 0000 0000
TRISF0
SSPM0
RBIF
Bit 0
BF
CKP
Control Bits State
0
0
1
1
0000 000x 0000 000u
1111 1111 1111 1111
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
0000 0000 0000 0000
POR, BOR
Value on
DS39612B-page 181
CKE
Value on
all other
Resets
1
0
1
0
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