PIC18LF6621-I/PT Microchip Technology, PIC18LF6621-I/PT Datasheet - Page 151
![IC PIC MCU FLASH 32KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18LF6621-I/PT
Manufacturer Part Number
PIC18LF6621-I/PT
Description
IC PIC MCU FLASH 32KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F6525-IPT.pdf
(396 pages)
3.PIC18F6525-IPT.pdf
(8 pages)
Specifications of PIC18LF6621-I/PT
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
53
Eeprom Memory Size
1024Byte
Ram Memory Size
3.75KB
Cpu Speed
40MHz
No. Of Timers
5
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
MSSP, SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF6621-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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16.0
PIC18F6525/6621/8525/8621 devices all have a total
of five CCP (Capture/Compare/PWM) modules. Two of
these (CCP4 and CCP5) implement standard Capture,
Compare and Pulse-Width Modulation (PWM) modes
and are discussed in this section. The other three
modules
standard Capture and Compare modes, as well as
Enhanced PWM modes. These are discussed in
Section 17.0 “Enhanced Capture/Compare/PWM
(ECCP) Module”.
Each CCP/ECCP module contains a 16-bit register
which can operate as a 16-bit Capture register, a 16-bit
Compare register or a PWM Master/Slave Duty Cycle
register. For the sake of clarity, all CCP module opera-
tion in the following sections is described with respect
to CCP4, but is equally applicable to CCP5.
REGISTER 16-1:
2005 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
(CCP) MODULES
(ECCP1,
bit 7-6
bit 5-4
bit 3-0
ECCP2,
CCPxCON REGISTER (CCP4 AND CCP5 MODULES)
bit 7
Unimplemented: Read as ‘0’
DCxB1:DCxB0: PWM Duty Cycle bit 1 and bit 0 for CCP Module x
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two Least Significant bits (bit 1 and bit 0) of the 10-bit PWM duty cycle. The
eight Most Significant bits (DCx9:DCx2) of the duty cycle are found in CCPRxL.
CCPxM3:CCPxM0: CCP Module x Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCPx module)
0001 = Reserved
0010 = Compare mode, toggle output on match (CCPxIF bit is set)
0011 = Reserved
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode; initialize CCP pin low; on compare match, force CCP pin high
1001 = Compare mode; initialize CCP pin high; on compare match, force CCP pin low
1010 = Compare mode; generate software interrupt on compare match (CCPIF bit is set,
1011 = Reserved
11xx = PWM mode
Legend:
R = Readable bit
-n = Value at POR
U-0
—
(CCPIF bit is set)
CCP pin reflects I/O state)
(CCPIF bit is set)
ECCP3)
U-0
—
implement
PIC18F6525/6621/8525/8621
DCxB1
R/W-0
W = Writable bit
‘1’ = Bit is set
DCxB0
R/W-0
Capture and Compare operations described in this
chapter apply to all standard and Enhanced CCP
modules. The operations of PWM mode described in
Section 16.4 “PWM Mode” apply to CCP4 and CCP5
only.
Note:
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCPxM3
R/W-0
Throughout this section and Section 17.0
“Enhanced
(ECCP) Module”, references to register
and bit names that may be associated with
a specific CCP module are referred to
generically by the use of ‘x’ or ‘y’ in place of
the
“CCPxCON” might refer to the control
register for CCP4 or CCP5, or ECCP1,
ECCP2 or ECCP3. “CCPxCON” is used
throughout these sections to refer to the
module control register, regardless of
whether the CCP module is a standard or
Enhanced implementation.
specific
CCPxM2 CCPxM1 CCPxM0
R/W-0
module
Capture/Compare/PWM
x = Bit is unknown
R/W-0
DS39612B-page 149
number.
R/W-0
Thus,
bit 0
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