PIC24HJ256GP610-I/PF Microchip Technology, PIC24HJ256GP610-I/PF Datasheet - Page 59

IC PIC MCU FLASH 128KX16 100TQFP

PIC24HJ256GP610-I/PF

Manufacturer Part Number
PIC24HJ256GP610-I/PF
Description
IC PIC MCU FLASH 128KX16 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ256GP610-I/PF

Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
100-TQFP, 100-VQFP
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b, 32x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
3-Wire/I2C/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
85
Number Of Timers
13
Operating Supply Voltage
0 V to 2.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (32-ch x 12-bit)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164323 - MODULE SKT FOR 100TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ256GP610-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24HJ256GP610-I/PF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
5.0
The PIC24HJXXXGPX06/X08/X10 devices contain
internal Flash program memory for storing and execut-
ing application code. The memory is readable, writable
and erasable during normal operation over the entire
V
Flash memory can be programmed in two ways:
1.
2.
ICSP
PIC24HJXXXGPX06/X08/X10 device to be serially
programmed while in the end application circuit. This is
simply done with two lines for programming clock and
programming data (one of the alternate programming
pin pairs: PGECx/PGEDx, and three other lines for
power (V
This allows customers to manufacture boards with
unprogrammed devices and then program the digital
FIGURE 5-1:
© 2009 Microchip Technology Inc.
DD
Note:
In-Circuit Serial Programming™ (ICSP™)
programming capability
Run-Time Self-Programming (RTSP)
range.
FLASH PROGRAM MEMORY
DD
programming
), ground (V
This data sheet summarizes the features
of
family of devices. However, it is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “PIC24H
Family Reference Manual”, Section 5.
“Flash Programming” (DS70228), which
is available from the Microchip website
(www.microchip.com).
the
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
ADDRESSING FOR TABLE REGISTERS
PIC24HJXXXGPX06/X08/X10
SS
) and Master Clear (MCLR).
capability
1/0
0
allows
TBLPAG Reg
PIC24HJXXXGPX06/X08/X10
8 bits
a
Program Counter
24-bit EA
24 bits
signal controller just before shipping the product. This
also allows the most recent firmware or a custom firm-
ware to be programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
can write program memory data either in blocks or
‘rows’ of 64 instructions (192 bytes) at a time, or single
instructions and erase program memory in blocks or
‘pages’ of 512 instructions (1536 bytes) at a time.
5.1
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits<7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in Figure 5-1.
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 bits
Table Instructions and Flash
Programming
0
Byte
Select
DS70175H-page 57

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