PIC16C76-20I/SP Microchip Technology, PIC16C76-20I/SP Datasheet - Page 40
![IC MCU OTP 8KX14 A/D PWM 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16C76-20I/SP
Manufacturer Part Number
PIC16C76-20I/SP
Description
IC MCU OTP 8KX14 A/D PWM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C63A-04SP.pdf
(184 pages)
4.PIC16C72-04SO.pdf
(289 pages)
5.PIC16C76-04SP.pdf
(8 pages)
Specifications of PIC16C76-20I/SP
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
OTP
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
22
Ram Memory Size
368Byte
Cpu Speed
10MHz
No. Of Timers
3
Interface
I2C, SPI, USART
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Package
28SPDIP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
22
Interface Type
I2C/SPI/USART
On-chip Adc
5-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16C63A/65B/73B/74B
6.2
The synchronization of T0CKI with the internal phase
clocks is accomplished by sampling the synchronized
input on the Q2 and Q4 cycles of the internal phase
clocks. Therefore, it is necessary for T0CKI to be high
for at least 2 T
low for at least 2 T
Refer to the electrical specification for the desired
device.
6.3
There is only one prescaler available which is mutually
exclusively shared between the Timer0 module and the
watchdog timer. A prescaler assignment for the Timer0
REGISTER 6-1:
DS30605C-page 40
Note:
Using Timer0 with an External
Clock
Prescaler
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
To avoid an unintended device RESET, the instruction sequence shown in the PICmicro™ Mid-Range MCU
Family Reference Manual (DS33023, Section 11.6) must be executed when changing the prescaler assign-
ment from Timer0 to the WDT. This sequence must be followed even if the WDT is disabled.
OSC
OSC
(and a small RC delay of 20 ns) and
(and a small RC delay of 20 ns).
OPTION_REG REGISTER
bit 7
RBPU
INTEDG
T0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS2:PS0: Prescaler Rate Select bits
Legend:
R = Readable bit
-n = Value at POR
Bit Value
R/W-1
RBPU
000
001
010
011
100
101
110
111
TMR0 Rate
INTEDG
R/W-1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
WDT Rate
R/W-1
T0CS
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
W = Writable bit
’1’ = Bit is set
R/W-1
T0SE
module means that there is no prescaler for the Watch-
dog Timer, and vice-versa. This prescaler is not read-
able or writable (see Figure 6-1).
The PSA and PS2:PS0 bits (OPTION_REG<3:0>)
determine the prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g., CLRF 1, MOVWF 1,
BSF 1,x....etc.) will clear the prescaler. When assigned
to WDT, a CLRWDT instruction will clear the prescaler
along with the Watchdog Timer. The prescaler is not
readable or writable.
Note:
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-1
Writing to TMR0, when the prescaler is
assigned to Timer0, will clear the prescaler
count, but will not change the prescaler
assignment.
PSA
R/W-1
PS2
2000 Microchip Technology Inc.
x = Bit is unknown
R/W-1
PS1
R/W-1
PS0
bit 0