AT89C5130A-S3SUM Atmel, AT89C5130A-S3SUM Datasheet - Page 141

• Manufacturer Part Number: AT89C5130A-S3SUM
• Description: IC 8051 MCU FLASH 16K USB 52PLCC
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5130A-S3SUM

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: 2-Wire, EUART, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89STK-05
• Minimum Operating Temperature: - 40 C
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: AT89C5130A-S3SIM; AT89C5130A-S3SIM

4337K–USB–04/08
Table 21-5.
Reset Value = 10h
Bit Number
7-6
7
-
5
4
3
2
1
0
Bit Mnemonic
USBIEN Register
USBIEN (S:BEh)
USB Global Interrupt Enable Register
EWUPCPU
EEORINT
ESOFINT
ESPINT
6
-
-
-
-
EWUPCPU
Description
Reserved
The value read from these bits is always 0. Do not set these bits.
Enable Wake Up CPU Interrupt
Set this bit to enable Wake Up CPU Interrupt.
(S:BEh) USB Global Interrupt Enable Register” on page
Clear this bit to disable Wake Up CPU Interrupt.
Enable End Of Reset Interrupt
Set this bit to enable End Of Reset Interrupt.
(S:BEh) USB Global Interrupt Enable Register” on page
reset.
Clear this bit to disable End Of Reset Interrupt.
Enable SOF Interrupt
Set this bit to enable SOF Interrupt.
Global Interrupt Enable Register” on page
Clear this bit to disable SOF Interrupt.
Reserved
The value read from these bits is always 0. Do not set these bits.
Enable Suspend Interrupt
Set this bit to enable Suspend Interrupts (see the
(S:BEh) USB Global Interrupt Enable Register” on page
Clear this bit to disable Suspend Interrupts.
5
EEORINT
4
ESOFINT
3
(See “USBIEN Register USBIEN (S:BEh) USB
AT89C5130A/31A-M
141.).
(See “USBIEN Register USBIEN
(See “USBIEN Register USBIEN
2
-
“USBIEN Register USBIEN
141.)
141.). This bit is set after
141).
1
-
ESPINT
0
141