ATMEGA1284P-PU Atmel, ATMEGA1284P-PU Datasheet - Page 330

• Manufacturer Part Number: ATMEGA1284P-PU
• Description: MCU AVR 128K ISP FLASH 40-PDIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA1284P-PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire/SPI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRAVEN, ATAVRRZUSBSTICK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 4KB
• Ram Memory Size: 16KB
• Cpu Speed: 20MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 26-7.
Notes:
8059D–AVR–11/09
Symbol
t
t
t
t
t
t
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
1. In ATmega1284P, this parameter is characterized and not 100% tested.
2. Required only for f
3. Cb = capacitance of one bus line in pF.
4. fCK = CPU clock frequency
5. This requirement applies to all ATmega1284P Two-wire Serial Interface operation. Other devices connected to the Two-wire
6. The actual low period generated by the ATmega1284P Two-wire Serial Interface is (1/f
7. The actual low period generated by the Two-wire Serial Interface is (1/f
Serial Bus need only obey the general f
than 6 MHz for the low time requirement to be strictly met at f
strictly met for f
speed (400 kHz) with other ATmega1284P devices, as well as any other device with a proper t
Parameter
High period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
2-wire Serial Bus Requirements (Continued)
SCL
Figure 26-5. 2-wire Serial Bus Timing
SCL
> 308 kHz when f
> 100 kHz.
SCL
SDA
t
SU;STA
CK
= 8 MHz. Still, ATmega1284P devices connected to the bus may communicate at full
SCL
requirement.
t
HD;STA
t
t
of
LOW
f
f
f
f
f
f
f
f
f
f
f
f
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
Condition
t
HIGH
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
SCL
t
HD;DAT
= 100 kHz.
SCL
t
LOW
- 2/f
CK
t
SU;DAT
), thus the low time requirement will not be
SCL
250
100
Min
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
0
0
- 2/f
ATmega1284P
CK
LOW
), thus f
acceptance margin.
t
SU;STO
CK
t
r
3.45
Max
0.9
–
–
–
–
–
–
–
–
–
–
must be greater
t
BUF
Units
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
330