PIC16LF877A-I/L Microchip Technology, PIC16LF877A-I/L Datasheet - Page 115

• Manufacturer Part Number: PIC16LF877A-I/L
• Description: IC MCU FLASH 8KX14 EE A/D 44PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF877A-I/L

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Core Processor: PIC
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Controller Family/series: PIC16LF
• No. Of I/o's: 33
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 368Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC16LF877AI/L

10.1
The BRG supports both the Asynchronous and Syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In Asynchronous
mode, bit BRGH (TXSTA<2>) also controls the baud
rate. In Synchronous mode, bit BRGH is ignored.
Table 10-1 shows the formula for computation of the
baud rate for different USART modes which only apply
in Master mode (internal clock).
Given the desired baud rate and F
integer value for the SPBRG register can be calculated
using the formula in Table 10-1. From this, the error in
baud rate can be determined.
TABLE 10-1:
TABLE 10-2:
 2003 Microchip Technology Inc.
98h
18h
99h
Legend: x = unknown, - = unimplemented, read as ‘0’. Shaded cells are not used by the BRG.
Legend: X = value in SPBRG (0 to 255)
Address
SYNC
0
1
USART Baud Rate Generator
(BRG)
TXSTA
RCSTA
SPBRG Baud Rate Generator Register
Name
(Asynchronous) Baud Rate = F
(Synchronous) Baud Rate = F
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
CSRC
SPEN
Bit 7
BRGH = 0 (Low Speed)
Bit 6
TX9
RX9
OSC
SREN CREN ADDEN
TXEN SYNC
Bit 5
, the nearest
OSC
OSC
Bit 4
/(64 (X + 1))
/(4 (X + 1))
Bit 3
—
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before
outputting the new baud rate.
10.1.1
The data on the RC7/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
BRGH TRMT TX9D 0000 -010 0000 -010
FERR OERR RX9D 0000 000x 0000 000x
Bit 2
SAMPLING
Bit 1
Baud Rate = F
OSC
BRGH = 1 (High Speed)
/(16 (X + 1)) equation can reduce the
Bit 0
PIC16F87XA
N/A
OSC
0000 0000 0000 0000
POR, BOR
Value on:
/(16 (X + 1))
DS39582B-page 113
Value on
all other
Resets