PIC18F4320-I/P Microchip Technology, PIC18F4320-I/P Datasheet - Page 218

IC MCU FLASH 4KX16 A/D 40-DIP

PIC18F4320-I/P

Manufacturer Part Number
PIC18F4320-I/P
Description
IC MCU FLASH 4KX16 A/D 40-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4320-I/P

Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI/I2C/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
5
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC18F2220/2320/4220/4320
19.1
For the A/D converter to meet its specified accuracy, the
Charge Holding Capacitor (C
fully charge to the input channel voltage level. The ana-
log input model is shown in Figure 19-2. The source
impedance (R
impedance directly affect the time required to charge the
capacitor C
varies over the device voltage (V
ance affects the offset voltage at the analog input (due to
pin leakage current). The maximum recommended
impedance for analog sources is 2.5 k . After the
analog input channel is selected (changed), the channel
must be sampled for at least the minimum acquisition
time before starting a conversion.
To
Equation 19-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
Example 19-1 shows the calculation of the minimum
required acquisition time T
on the following application system assumptions:
C
R
Conversion Error
V
Temperature
V
EQUATION 19-1:
EQUATION 19-2:
EXAMPLE 19-1:
DS39599C-page 216
T
V
or
T
T
T
T
Temperature coefficient is only required for temperatures > 25 C. Below 25 C, T
T
T
HOLD
S
DD
HOLD
ACQ
C
ACQ
AMP
COFF
C
ACQ
Note:
HOLD
calculate
=
=
A/D Acquisition Requirements
=
=
HOLD
=
=
=
=
When the conversion is started, the holding
capacitor is disconnected from the input pin.
S
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
T
) and the internal sampling switch (R
AMP
. The sampling switch (R
the
(V
-(C
+ T
REF
=
=
=
=
=
T
5 s
(Temp – 25 C)(0.05 s/ C)
(50 C – 25 C)(0.05 s/ C)
1.25 s
-(C
-(120 pF) (1 k + 7 k + 2.5 k ) ln(0.0004883) s
9.61 s
5 s + 1.25 s + 9.61 s
12.86 s
HOLD
AMP
ACQUISITION TIME
MINIMUM A/D HOLDING CAPACITOR
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
C
minimum
HOLD
– (V
+ T
120 pF
2.5 k
1/2 LSb
5V
50 C (system max.)
0V @ time = 0
ACQ
)(R
+ T
COFF
REF
)(R
IC
HOLD
C
. This calculation is based
+ T
Rss = 7 k
+ R
/2048)) • (1 – e
IC
DD
) must be allowed to
+ R
COFF
). The source imped-
SS
acquisition
+ R
SS
+ R
SS
S
) ln(1/2048)
) impedance
S
) ln(1/2047) s
(-Tc/C
time,
HOLD
SS
)
(R
IC
+ R
SS
+ R
19.2
If external voltage references are used instead of the
internal AV
ance of the V
considered. During acquisition, currents supplied by
these sources are insignificant. However, during con-
version, the A/D module sinks and sources current
through the reference sources.
In order to maintain the A/D accuracy, the voltage ref-
erence source impedances should be kept low to
reduce voltage changes. These voltage changes occur
as reference currents flow through the reference
source impedance. The maximum recommended
impedance of the V
reference voltage sources is 75 .
S
Note:
))
)
A/D V
DD
COFF
When using external references, the
source impedance of the external voltage
references must be less than 75 in order
to achieve the specified ADC resolution. A
higher reference source impedance will
increase the ADC offset and gain errors.
Resistive voltage dividers will not provide a
low enough source impedance. To ensure
the best possible ADC performance, exter-
nal V
op amp or other low-impedance circuit.
REF
and AV
= 0 s.
REF
REF
+ and V
+ and V
inputs should be buffered with an
SS
 2003 Microchip Technology Inc.
REF
REF
sources, the source imped-
- voltage sources must be
+ and V
REF
- References
REF
- external

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