PIC18F2550-I/SP Microchip Technology, PIC18F2550-I/SP Datasheet - Page 118

• Manufacturer Part Number: PIC18F2550-I/SP
• Description: IC PIC MCU FLASH 16KX16 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2550-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: SPI, I2C, EAUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163025, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRDDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2455/2550/4455/4550
TABLE 10-3:
TABLE 10-4:
DS39632C-page 116
PORTB
LATB
TRISB
INTCON
INTCON2
INTCON3
ADCON1
SPPCON
SPPCFG
UCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTB.
Note 1:
RB6/KBI2/
PGC
RB7/KBI3/
PGD
Legend:
Note 1:
Name
Pin
2:
3:
4:
(1)
(1)
These registers are unimplemented on 28-pin devices.
OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
I
overridden for this option)
Configuration on POR is determined by PBADEN Configuration bit. Pins are configured as analog inputs when
PBADEN is set and digital inputs when PBADEN is cleared.
Alternate pin assignment for CCP2 when CCP2MX = 0. Default assignment is RC1.
All other pin functions are disabled when ICSP™ or ICD operation is enabled.
40/44-pin devices only.
2
C/SMB = I
CLKCFG1 CLKCFG0
GIE/GIEH PEIE/GIEL TMR0IE
TRISB7
Function
INT2IP
LATB7
RBPU
Bit 7
RB7
PORTB I/O SUMMARY (CONTINUED)
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
KBI2
PGC
KBI3
PGD
RB6
RB7
—
—
—
2
C/SMBus input buffer, TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is
Setting
INTEDG0 INTEDG1 INTEDG2
PPBRST
TRIS
TRISB6
INT1IP
LATB6
Bit 6
RB6
0
1
1
x
0
1
1
x
x
—
—
OUT
OUT
OUT
I/O
IN
IN
IN
IN
IN
IN
TRISB5
VCFG1
LATB5
CSEN
Bit 5
RB5
SE0
—
—
I/O Type
DIG
TTL
TTL
DIG
TTL
TTL
DIG
ST
ST
Preliminary
CLK1EN
PKTDIS
TRISB4
VCFG0
INT0IE
INT2IE
LATB4
Bit 4
RB4
LATB<6> data output.
PORTB<6> data input; weak pull-up when RBPU bit is cleared.
Interrupt-on-pin change.
Serial execution (ICSP™) clock input for ICSP and ICD operation.
LATB<7> data output.
PORTB<7> data input; weak pull-up when RBPU bit is cleared.
Interrupt-on-pin change.
Serial execution data output for ICSP and ICD operation.
Serial execution data input for ICSP and ICD operation.
—
TRISB3
USBEN
PCFG3
INT1IE
LATB3
RBIE
Bit 3
WS3
RB3
—
—
RESUME SUSPND
TMR0IP
TMR0IF
TRISB2
PCFG2
LATB2
WS2
Bit 2
RB2
—
—
Description
SPPOWN
TRISB1
PCFG1
INT0IF
INT2IF
LATB1
© 2006 Microchip Technology Inc.
Bit 1
WS1
RB1
—
TRISB0
PCFG0
SPPEN
INT1IF
LATB0
RBIF
RBIP
Bit 0
WS0
RB0
—
(3)
(3)
on page
Values
Reset
54
52
54
54
51
51
51
55
55
55
(3)