AT89C5130A-PUTUM Atmel, AT89C5130A-PUTUM Datasheet - Page 27

• Manufacturer Part Number: AT89C5130A-PUTUM
• Description: IC 8051 MCU FLASH 16K USB 32QFN
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5130A-PUTUM

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Package: 32QFN EP
• Device Core: 8051
• Family Name: 89C
• Maximum Speed: 48 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 34
• Interface Type: SPI/TWI/UART/USB
• Number Of Timers: 3
• Processor Series: AT89x
• Core: 8051
• Data Ram Size: 1.25 KB
• Maximum Clock Frequency: 48 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89STK-05
• Minimum Operating Temperature: - 40 C
• Height: 0.95 mm
• Length: 7 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7 mm
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: AT89C5130A-PUTIM; AT89C5130A-PUTIM

7. Dual Data Pointer Register
Figure 7-1.
4337K–USB–04/08
7
Use of Dual Pointer
AUXR1(A2H)
The additional data pointer can be used to speed up code execution and reduce code size.
The dual DPTR structure is a way by which the chip will specify the address of an external data
memory location. There are two 16-bit DPTR registers that address the external memory, and a
single bit called DPS = AUXR1.0 (see Table 7-1) that allows the program code to switch
between them (see Figure 7-1).
Table 7-1.
Reset Value = XX[BLJB]X X0X0b
Not bit addressable
a. Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.
DPS
0
Number
Bit
7
6
5
4
3
2
1
0
7
-
AUXR1 Register
AUXR1- Auxiliary Register 1(0A2h)
Mnemonic
DPH(83H) DPL(82H)
ENBOOT
DPS
GF3
Bit
0
-
-
-
-
6
-
DPTR1
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable Boot Flash
Cleared to disable boot ROM.
Set to map the boot ROM between F800h - 0FFFFh.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
This bit is a general-purpose user flag.
Always cleared.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Cleared to select DPTR0.
Set to select DPTR1.
ENBOOT
DPTR0
5
4
-
GF3
3
AT89C5130A/31A-M
External Data Memory
2
0
1
-
DPS
0
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