ATMEGA165PV-8MU Atmel, ATMEGA165PV-8MU Datasheet - Page 86

IC AVR MCU 16K 8MHZ 64-QFN

ATMEGA165PV-8MU

Manufacturer Part Number
ATMEGA165PV-8MU
Description
IC AVR MCU 16K 8MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA165PV-8MU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
64QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
13.5.3
13.6
8019K–AVR–11/10
Compare Match Output Unit
Using the Output Compare Unit
Since writing TCNT0 in any mode of operation will block all compare matches for one timer clock
cycle, there are risks involved when changing TCNT0 when using the Output Compare unit,
independently of whether the Timer/Counter is running or not. If the value written to TCNT0
equals the OCR0A value, the compare match will be missed, resulting in incorrect waveform
generation. Similarly, do not write the TCNT0 value equal to BOTTOM when the counter is
downcounting.
The setup of the OC0A should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OC0A value is to use the Force Output Com-
pare (FOC0A) strobe bits in Normal mode. The OC0A Register keeps its value even when
changing between Waveform Generation modes.
Be aware that the COM0A1:0 bits are not double buffered together with the compare value.
Changing the COM0A1:0 bits will take effect immediately.
The Compare Output mode (COM0A1:0) bits have two functions. The Waveform Generator
uses the COM0A1:0 bits for defining the Output Compare (OC0A) state at the next compare
match. Also, the COM0A1:0 bits control the OC0A pin output source.
plified schematic of the logic affected by the COM0A1:0 bit setting. The I/O Registers, I/O bits,
and I/O pins in the figure are shown in bold. Only the parts of the general I/O port control regis-
ters (DDR and PORT) that are affected by the COM0A1:0 bits are shown. When referring to the
OC0A state, the reference is for the internal OC0A Register, not the OC0A pin. If a System
Reset occur, the OC0A Register is reset to “0”.
Figure 13-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC0A) from the Waveform
Generator if either of the COM0A1:0 bits are set. However, the OC0A pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC0A pin (DDR_OC0A) must be set as output before the OC0A value is vis-
ible on the pin. The port override function is independent of the Waveform Generation mode.
COMnx1
COMnx0
FOCn
clk
I/O
Waveform
Generator
D
D
D
PORT
OCnx
DDR
Q
Q
Q
1
0
Figure 13-4
ATmega165P
OCn
Pin
shows a sim-
86

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