ATMEGA165PV-8MU Atmel, ATMEGA165PV-8MU Datasheet - Page 204

IC AVR MCU 16K 8MHZ 64-QFN

ATMEGA165PV-8MU

Manufacturer Part Number
ATMEGA165PV-8MU
Description
IC AVR MCU 16K 8MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA165PV-8MU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
64QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
21. ADC - Analog to Digital Converter
21.1
21.2
8019K–AVR–11/10
Features
Overview
The ATmega165P features a 10-bit successive approximation ADC. The ADC is connected to
an 8-channel Analog Multiplexer which allows eight single-ended voltage inputs constructed
from the pins of Port F. The single-ended voltage inputs refer to 0V (GND).
The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is
held at a constant level during conversion. A block diagram of the ADC is shown in
on page
The ADC has a separate analog supply voltage pin, AVCC. AV
±0.3V from V
pin.
Internal reference voltages of nominally 1.1V or AVCC are provided On-chip. The voltage refer-
ence may be externally decoupled at the AREF pin by a capacitor for better noise performance.
The Power Reduction ADC bit, PRADC, in
be written to zero to enable the ADC module.
10-bit Resolution
0.5 LSB Integral Non-linearity
±2 LSB Absolute Accuracy
13 µs - 260 µs Conversion Time (50 kHz to 1 MHz ADC clock)
Up to 15 kSPS at Maximum Resolution (200 kHz ADC clock)
Eight Multiplexed Single Ended Input Channels
Optional Left Adjustment for ADC Result Readout
0 - V
Selectable 1.1V ADC Reference Voltage
Free Running or Single Conversion Mode
ADC Start Conversion by Auto Triggering on Interrupt Sources
Interrupt on ADC Conversion Complete
Sleep Mode Noise Canceler
CC
205.
ADC Input Voltage Range
CC
. See the paragraph
“ADC Noise Canceler” on page 211
“PRR – Power Reduction Register” on page 41
CC
must not differ more than
ATmega165P
on how to connect this
Figure 21-1
must
204

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