PIC16F84A-20I/SS Microchip Technology, PIC16F84A-20I/SS Datasheet - Page 238

IC MCU FLASH 1KX14 EE 20SSOP

PIC16F84A-20I/SS

Manufacturer Part Number
PIC16F84A-20I/SS
Description
IC MCU FLASH 1KX14 EE 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F84A-20I/SS

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Controller Family/series
PIC16F
No. Of I/o's
13
Eeprom Memory Size
64Byte
Ram Memory Size
68Byte
Cpu Speed
20MHz
No. Of Timers
1
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
Data Rom Size
64 B
Height
1.75 mm
Length
7.2 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
5.3 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPI3-DB16F84A - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPAC164018 - MODULE SKT PROMATEII 20SSOP
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F84A-20I/SS
Manufacturer:
MICROCHIP
Quantity:
2 560
Part Number:
PIC16F84A-20I/SS
Manufacturer:
MIC
Quantity:
20 000
PICmicro MID-RANGE MCU FAMILY
15.4.1
DS31015A-page 15-18
Slave Mode
In slave mode, the SCL and SDA pins must be configured as inputs (TRIS set). The SSP module
will override the input state with the output data when required (slave-transmitter).
When an address is matched or the data transfer after an address match is received, the hard-
ware automatically will generate the acknowledge (ACK) pulse, and then load the SSPBUF reg-
ister with the received value currently in the SSPSR register.
There are certain conditions that will cause the SSP module not to give this ACK pulse. These
are if either (or both):
a)
b)
In this case, the SSPSR register value is not loaded into the SSPBUF, but the SSPIF and SSPOV
bits are set.
tus of bits BF and SSPOV. The shaded cells show the condition where user software did not prop-
erly clear the overflow condition. Flag bit BF is cleared by reading the SSPBUF register while bit
SSPOV is cleared through software.
The SCL clock input must have a minimum high and low time for proper operation. The high and
low times of the I
Device Data Sheet electrical specifications
The buffer full bit, BF (SSPSTAT<0>), was set before the message completed.
The overflow bit, SSPOV (SSPCON<6>), was set before the message completed.
Table 15-2
2
C specification as well as the requirement of the SSP module is shown in
shows what happens when a data transfer byte is received, given the sta-
parameters 100
and 101.
1997 Microchip Technology Inc.

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