DSPIC30F3014-20I/ML Microchip Technology, DSPIC30F3014-20I/ML Datasheet - Page 217

• Manufacturer Part Number: DSPIC30F3014-20I/ML
• Description: IC DSPIC MCU/DSP 24K 44QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3014-20I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 30
• Flash Memory Size: 24KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F301420IML

INDEX
A
A/D .................................................................................... 129
AC Characteristics ............................................................ 178
AC Temperature and Voltage Specifications .................... 178
AC-Link Mode Operation .................................................. 126
ADC
ADC Conversion Speeds .................................................. 132
Address Generator Units .................................................... 35
Alternate Vector Table ........................................................ 63
Analog-to-Digital Converter. See A/D.
Assembler
Automatic Clock Stretch...................................................... 92
B
Band Gap Start-up Time
Barrel Shifter ....................................................................... 21
Bit-Reversed Addressing .................................................... 38
Block Diagrams
© 2008 Microchip Technology Inc.
Aborting a Conversion .............................................. 131
ADCHS Register ....................................................... 129
ADCON1 Register..................................................... 129
ADCON2 Register..................................................... 129
ADCON3 Register..................................................... 129
ADCSSL Register ..................................................... 129
ADPCFG Register..................................................... 129
Configuring Analog Port Pins.............................. 54, 136
Connection Considerations....................................... 136
Conversion Operation ............................................... 130
Effects of a Reset...................................................... 135
Operation During CPU Idle Mode ............................. 135
Operation During CPU Sleep Mode.......................... 135
Output Formats ......................................................... 135
Power-Down Modes.................................................. 135
Programming the Sample Trigger............................. 131
Register Map............................................................. 137
Result Buffer ............................................................. 130
Sampling Requirements............................................ 134
Selecting the Conversion Sequence......................... 130
Load Conditions ........................................................ 178
16-Bit Mode............................................................... 126
20-Bit Mode............................................................... 127
Selecting the Conversion Clock ................................ 131
MPASM Assembler................................................... 166
During 10-Bit Addressing (STREN = 1) ...................... 92
During 7-Bit Addressing (STREN = 1) ........................ 92
Receive Mode ............................................................. 92
Transmit Mode ............................................................ 92
Requirements............................................................ 184
Example ...................................................................... 38
Implementation ........................................................... 38
Modifier Values Table ................................................. 39
Sequence Table (16-Entry)......................................... 39
12-Bit A/D Functional ................................................ 129
16-Bit Timer1 Module.................................................. 67
16-Bit Timer2 .............................................................. 73
16-Bit Timer3 .............................................................. 73
16-Bit Timer4 .............................................................. 78
16-Bit Timer5 .............................................................. 78
32-Bit Timer2/3 ........................................................... 72
32-Bit Timer4/5 ........................................................... 77
CAN Buffers and Protocol Engine............................. 110
DCI Module ............................................................... 120
Dedicated Port Structure............................................. 53
BOR Characteristics ......................................................... 177
BOR. See Brown-out Reset.
Brown-out Reset
C
C Compilers
CAN Module ..................................................................... 109
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 139
Control Registers ................................................................ 42
Core Architecture
CPU Architecture Overview ................................................ 13
Customer Change Notification Service............................. 220
Customer Notification Service .......................................... 220
Customer Support............................................................. 220
D
Data Accumulators and Adder/Subtracter .......................... 19
Data Accumulators and Adder/Subtractor
dsPIC30F3014/4013
DSP Engine ................................................................ 18
dsPIC30F3014.............................................................. 9
dsPIC30F4013............................................................ 10
External Power-on Reset Circuit .............................. 151
I
Input Capture Mode.................................................... 81
Oscillator System...................................................... 141
Output Compare Mode ............................................... 85
Reset System ........................................................... 149
Shared Port Structure................................................. 54
SPI.............................................................................. 98
SPI Master/Slave Connection..................................... 98
UART Receiver......................................................... 102
UART Transmitter..................................................... 101
Timing Requirements ............................................... 184
MPLAB C18.............................................................. 166
MPLAB C30.............................................................. 166
Baud Rate Setting .................................................... 114
CAN1 Register Map.................................................. 116
Frame Types ............................................................ 109
I/O Timing Requirements.......................................... 202
Message Reception.................................................. 112
Message Transmission............................................. 113
Modes of Operation .................................................. 111
Overview................................................................... 109
Requirements ........................................................... 182
Data EEPROM Block Erase ....................................... 48
Data EEPROM Block Write ........................................ 50
Data EEPROM Read.................................................. 47
Data EEPROM Word Erase ....................................... 48
Data EEPROM Word Write ........................................ 49
Erasing a Row of Program Memory ........................... 43
Initiating a Programming Sequence ........................... 44
Loading Write Latches ................................................ 44
Port Write/Read .......................................................... 54
NVMADR .................................................................... 42
NVMADRU ................................................................. 42
NVMCON.................................................................... 42
NVMKEY .................................................................... 42
Overview..................................................................... 13
Data Space Write Saturation ...................................... 21
Overflow and Saturation ............................................. 19
Round Logic ............................................................... 20
Write-Back .................................................................. 20
2
C .............................................................................. 90
DS70138F-page 215