DSPIC30F3014-30I/ML Microchip Technology, DSPIC30F3014-30I/ML Datasheet - Page 101

• Manufacturer Part Number: DSPIC30F3014-30I/ML
• Description: IC DSPIC MCU/DSP 24K 44QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3014-30I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F301430IML

15.3
The SSx pin allows a Synchronous Slave mode. The
SPI must be configured in SPI Slave mode with SSx pin
control enabled (SSEN = 1). When the SSx pin is low,
transmission and reception are enabled and the SDOx
pin is driven. When SSx pin goes high, the SDOx pin is
no longer driven. Also, the SPI module is resynchro-
nized, and all counters/control circuitry are reset.
Therefore, when the SSx pin is asserted low again,
transmission/reception begins at the MSb even if SSx
had been deasserted in the middle of a transmit/
receive.
15.4
During Sleep mode, the SPI module is shut down. If the
CPU enters Sleep mode while an SPI transaction is in
progress, then the transmission and reception is
aborted.
The transmitter and receiver stop in Sleep mode.
However, register contents are not affected by entering
or exiting Sleep mode.
 2010 Microchip Technology Inc.
Slave Select Synchronization
SPI Operation During CPU Sleep
Mode
15.5
When the device enters Idle mode, all clock sources
remain functional. The SPISIDL bit (SPIxSTAT<13>)
determines if the SPI module stops or continues on
Idle. If SPISIDL = 0, the module continues to operate
when the CPU enters Idle mode. If SPISIDL = 1, the
module stops when the CPU enters Idle mode.
dsPIC30F3014/4013
SPI Operation During CPU Idle
Mode
DS70138G-page 101