PIC24FJ96GA006-I/PT Microchip Technology, PIC24FJ96GA006-I/PT Datasheet - Page 55
![IC PIC MCU FLASH 48KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC24FJ96GA006-I/PT
Manufacturer Part Number
PIC24FJ96GA006-I/PT
Description
IC PIC MCU FLASH 48KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.DV164033.pdf
(50 pages)
2.PIC24FJ16GA002-ISS.pdf
(52 pages)
3.PIC24FJ64GA006-IPT.pdf
(240 pages)
4.PIC24FJ64GA006-IPT.pdf
(22 pages)
Specifications of PIC24FJ96GA006-I/PT
Program Memory Type
FLASH
Program Memory Size
96KB (32K x 24)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011, DV164033, AC164127, MA240011
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ96GA006-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- DV164033 PDF datasheet
- PIC24FJ16GA002-ISS PDF datasheet #2
- PIC24FJ64GA006-IPT PDF datasheet #3
- PIC24FJ64GA006-IPT PDF datasheet #4
- Current page: 55 of 240
- Download datasheet (4Mb)
TABLE 5-1:
5.1
If clock switching is enabled, the system clock source
at device Reset is chosen as shown in Table 5-2. If
clock switching is disabled, the system clock source is
always selected according to the oscillator Configura-
tion bits. Refer to 7.0 “Oscillator Configuration” for
further details.
TABLE 5-2:
© 2009 Microchip Technology Inc.
TRAPR (RCON<15>)
IOPUWR (RCON<14>)
EXTR (RCON<7>)
SWR (RCON<6>)
WDTO (RCON<4>)
SLEEP (RCON<3>)
IDLE (RCON<2>)
BOR (RCON<1>)
POR (RCON<0>)
Note:
Reset Type
WDTR
MCLR
SWR
POR
BOR
Clock Source Selection at Reset
Flag Bit
All Reset flag bits may be set or cleared by the user software.
Oscillator Configuration bits
(FNOSC2:FNOSC0)
COSC Control bits
(OSCCON<14:12>)
RESET FLAG BIT OPERATION
OSCILLATOR SELECTION vs.
TYPE OF RESET (CLOCK
SWITCHING ENABLED)
Clock Source Determinant
Trap conflict event
Illegal opcode or uninitialized W register access
MCLR Reset
RESET instruction
WDT time-out
PWRSAV #SLEEP instruction
PWRSAV #IDLE instruction
POR, BOR
POR
PIC24FJ128GA010 FAMILY
Setting Event
5.2
The Reset times for various types of device Reset are
summarized in Table 5-3. Note that the system Reset
signal, SYSRST, is released after the POR and PWRT
delay times expire.
The time that the device actually begins to execute
code will also depend on the system oscillator delays,
which include the Oscillator Start-up Timer (OST) and
the PLL lock time. The OST and PLL lock times occur
in parallel with the applicable SYSRST delay times.
The FSCM delay determines the time at which the
FSCM begins to monitor the system clock source after
the SYSRST signal is released.
Device Reset Times
POR
POR
POR
POR
PWRSAV instruction, POR
POR
POR
—
—
Clearing Event
DS39747E-page 55
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