PIC24FJ64GA104-I/PT Microchip Technology, PIC24FJ64GA104-I/PT Datasheet - Page 291

• Manufacturer Part Number: PIC24FJ64GA104-I/PT
• Description: IC PIC MCU FLASH 64KB 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ64GA104-I/PT

• Core Size: 16-Bit
• Program Memory Size: 64KB (22K x 24)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC24
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: I2C, LIN, SPI, USART
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, LIN, SPI, USART
• Rohs Compliant: Yes
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001, MA240020, DM240002, DM240011, DV164033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

INDEX
A
A/D Converter
AC Characteristics
Alternate Interrupt Vector Table (AIVT) .............................. 61
Analog and Digital Pins Configuration During
Assembler
B
Basic Connection Requirements......................................... 17
Block Diagrams
© 2009 Microchip Technology Inc.
Analog Input Model ................................................... 223
Transfer Function...................................................... 224
A/D Specifications..................................................... 274
ADC Conversion Requirements................................ 275
Capacitive Loading Requirements on
CLKO and I/O Timing................................................ 273
External Clock Requirements ................................... 271
Internal RC Oscillator Accuracy ................................ 272
Internal RC Oscillator Specifications......................... 272
Load Conditions and Requirements for Timing
Reset, Power-up Timer and Brown-out
Temperature and Voltage Specifications .................. 270
ICSP Operations ......................................................... 20
MPASM Assembler................................................... 248
10-Bit High-Speed A/D Converter............................. 216
16-Bit Asynchronous Timer3 and Timer5 ................. 143
16-Bit Synchronous Timer2 and Timer4 ................... 143
16-Bit Timer1 Module................................................ 139
32-Bit Timer2/3 and Timer4/5 ................................... 142
8-Bit Multiplexed Address and Data
Accessing Program Memory Using Table
Addressable PSP Example....................................... 194
Addressing for Table Registers................................... 47
CALL Stack Frame...................................................... 43
Comparator Voltage Reference ................................ 229
CPU Programmer’s Model .......................................... 23
CRC Module ............................................................. 209
CRC Shift Engine...................................................... 209
CTMU Connections and Internal Configuration
CTMU Typical Connections and Internal
CTMU Typical Connections and Internal
Data Access From Program Space
I
Individual Comparator Configurations....................... 226
Input Capture ............................................................ 147
LCD Control Example, Byte Mode ............................ 196
Legacy PSP Example ............................................... 194
Master Mode, Demultiplexed Addressing ................. 194
Master Mode, Fully Multiplexed Addressing ............. 195
Master Mode, Partially Multiplexed Addressing ........ 195
MCLR Pin Connections Example................................ 18
Multiplexed Addressing Application Example ........... 195
On-Chip Regulator Connections ............................... 242
Oscillator Circuit Placement........................................ 20
2
C Module ................................................................ 172
Output Pins ....................................................... 270
Specifications.................................................... 270
Reset Timing..................................................... 273
Application Example ......................................... 196
Instructions ......................................................... 45
for Capacitance Measurement.......................... 231
Configuration for Pulse Delay Generation ........ 232
Configuration for Time Measurement ............... 232
Address Generation ........................................... 44
PIC24FJ64GA104 FAMILY
Preliminary
C
C Compilers
Charge Time Measurement Unit. See CTMU.
Code Examples
Code Protection ................................................................ 244
Comparator Voltage Reference ........................................ 229
Configuration Bits ............................................................. 235
Core Features....................................................................... 7
CPU
Output Compare (16-Bit Mode) ................................ 152
Output Compare (Double-Buffered,
Parallel EEPROM Example, 16-Bit Data .................. 196
Parallel EEPROM Example, 8-Bit Data .................... 196
Partially Multiplexed Addressing
PIC24F CPU Core ...................................................... 22
PIC24FJ64GA104 Family (General)........................... 10
PMP Module Overview ............................................. 187
PSV Operation............................................................ 46
Recommended Minimum Connections....................... 17
Reset System ............................................................. 55
RTCC........................................................................ 197
Shared I/O Port Structure ......................................... 117
SPI Master, Frame Master Connection .................... 169
SPI Master, Frame Slave Connection ...................... 169
SPI Master/Slave Connection (Enhanced
SPI Master/Slave Connection (Standard Mode)....... 168
SPI Slave, Frame Master Connection ...................... 169
SPI Slave, Frame Slave Connection ........................ 169
SPIx Module (Enhanced Mode)................................ 163
SPIx Module (Standard Mode) ................................. 162
System Clock.............................................................. 97
Triple Comparator Module........................................ 225
UART (Simplified)..................................................... 179
Watchdog Timer (WDT)............................................ 244
MPLAB C18.............................................................. 248
Basic Sequence for Clock Switching ........................ 103
Configuring UART1 Input and Output
Erasing a Program Memory Block, ‘C’........................ 51
Erasing a Program Memory Block, Assembly ............ 50
I/O Port Write/Read .................................................. 118
Initiating a Programming Sequence, ‘C’ ..................... 52
Initiating a Programming Sequence, Assembly.......... 52
Loading the Write Buffers, ‘C’..................................... 52
Loading the Write Buffers, Assembly ......................... 51
PWRSAV Instruction Syntax .................................... 107
Setting the RTCWREN Bit ........................................ 198
Single-Word Flash Programming, ‘C’ ......................... 53
Single-Word Flash Programming, Assembly.............. 53
Code Segment.......................................................... 245
Code Segment Protection
Configuration Register.............................................. 245
General Segment ..................................................... 244
Configuring ............................................................... 229
Arithmetic Logic Unit (ALU) ........................................ 25
Control Registers........................................................ 24
Core Registers............................................................ 23
Programmer’s Model .................................................. 21
16-Bit PWM Mode) ........................................... 154
Application Example ......................................... 195
Buffer Modes) ................................................... 168
Functions (PPS) ............................................... 123
Configuration Options....................................... 245
DS39951B-page 289