ATMEGA168-20PU Atmel, ATMEGA168-20PU Datasheet - Page 218
![IC AVR MCU 16K 20MHZ 28DIP](/photos/7/21/72189/453-28-dip_sml.jpg)
ATMEGA168-20PU
Manufacturer Part Number
ATMEGA168-20PU
Description
IC AVR MCU 16K 20MHZ 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATAVRTS2080B.pdf
(378 pages)
2.ATMEGA48-20AU.pdf
(35 pages)
3.ATMEGA88-20MU.pdf
(33 pages)
4.ATMEGA168-20AU.pdf
(359 pages)
Specifications of ATMEGA168-20PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire, SPI, USART, Serial
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
A/d Inputs
6-Channel, 10-Bit
Cpu Speed
20 MIPS
Eeprom Memory
512 Bytes
Input Output
23
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin PDIP
Programmable Memory
16K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA168-20PU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- ATAVRTS2080B PDF datasheet
- ATMEGA48-20AU PDF datasheet #2
- ATMEGA88-20MU PDF datasheet #3
- ATMEGA168-20AU PDF datasheet #4
- Current page: 218 of 378
- Download datasheet (8Mb)
218
ATmega48/88/168
2. When the START condition has been transmitted, the TWINT Flag in TWCR is set, and
3. The application software should now examine the value of TWSR, to make sure that the
4. When the address packet has been transmitted, the TWINT Flag in TWCR is set, and
5. The application software should now examine the value of TWSR, to make sure that the
6. When the data packet has been transmitted, the TWINT Flag in TWCR is set, and TWSR
7. The application software should now examine the value of TWSR, to make sure that the
Even though this example is simple, it shows the principles involved in all TWI transmissions.
These can be summarized as follows:
• When the TWI has finished an operation and expects application response, the TWINT Flag is
set. The SCL line is pulled low until TWINT is cleared.
condition. Which value to write is described later on. However, it is important that the
TWINT bit is set in the value written. Writing a one to TWINT clears the flag. The TWI will
not start any operation as long as the TWINT bit in TWCR is set. Immediately after the
application has cleared TWINT, the TWI will initiate transmission of the START condition.
TWSR is updated with a status code indicating that the START condition has success-
fully been sent.
START condition was successfully transmitted. If TWSR indicates otherwise, the applica-
tion software might take some special action, like calling an error routine. Assuming that
the status code is as expected, the application must load SLA+W into TWDR. Remember
that TWDR is used both for address and data. After TWDR has been loaded with the
desired SLA+W, a specific value must be written to TWCR, instructing the TWI hardware
to transmit the SLA+W present in TWDR. Which value to write is described later on.
However, it is important that the TWINT bit is set in the value written. Writing a one to
TWINT clears the flag. The TWI will not start any operation as long as the TWINT bit in
TWCR is set. Immediately after the application has cleared TWINT, the TWI will initiate
transmission of the address packet.
TWSR is updated with a status code indicating that the address packet has successfully
been sent. The status code will also reflect whether a Slave acknowledged the packet or
not.
address packet was successfully transmitted, and that the value of the ACK bit was as
expected. If TWSR indicates otherwise, the application software might take some special
action, like calling an error routine. Assuming that the status code is as expected, the
application must load a data packet into TWDR. Subsequently, a specific value must be
written to TWCR, instructing the TWI hardware to transmit the data packet present in
TWDR. Which value to write is described later on. However, it is important that the
TWINT bit is set in the value written. Writing a one to TWINT clears the flag. The TWI will
not start any operation as long as the TWINT bit in TWCR is set. Immediately after the
application has cleared TWINT, the TWI will initiate transmission of the data packet.
is updated with a status code indicating that the data packet has successfully been sent.
The status code will also reflect whether a Slave acknowledged the packet or not.
data packet was successfully transmitted, and that the value of the ACK bit was as
expected. If TWSR indicates otherwise, the application software might take some special
action, like calling an error routine. Assuming that the status code is as expected, the
application must write a specific value to TWCR, instructing the TWI hardware to transmit
a STOP condition. Which value to write is described later on. However, it is important that
the TWINT bit is set in the value written. Writing a one to TWINT clears the flag. The TWI
will not start any operation as long as the TWINT bit in TWCR is set. Immediately after
the application has cleared TWINT, the TWI will initiate transmission of the STOP condi-
tion. Note that TWINT is NOT set after a STOP condition has been sent.
2545S–AVR–07/10
Related parts for ATMEGA168-20PU
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![ATmega168](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Atmel Corporation
Datasheet:
![ATmega168 Automotive](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Atmel Corporation
Datasheet:
![ATMEGA168-20AJ](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
ATMEL Corporation
Datasheet:
![ATMEGA168-20AU](/photos/6/91/69154/313-32-tqfp_tmb.jpg)
Part Number:
Description:
IC AVR MCU 16K 20MHZ 32TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA168-20MU](/photos/12/13/121319/atmega168-20mu_tmb.jpg)
Part Number:
Description:
IC AVR MCU 16K 20MHZ 32-QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA168-15AZ](/photos/6/91/69154/313-32-tqfp_tmb.jpg)
Part Number:
Description:
MCU AVR 16K FLASH 15MHZ 32-TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA168-15MZ](/photos/30/99/309943/qfn-32_tmb.jpg)
Part Number:
Description:
MCU AVR 16K FLASH 15MHZ 32-QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA168-20AI](/photos/6/91/69154/313-32-tqfp_tmb.jpg)
Part Number:
Description:
IC AVR MCU 16K 20MHZ 32TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA168-20MUR](/images/manufacturer_photos/0/0/78/atmel_tmb.jpg)
Part Number:
Description:
MCU AVR 16KB FLASH 20MHZ 32QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA168-20AUR](/photos/6/91/69154/313-32-tqfp_tmb.jpg)
Part Number:
Description:
MCU AVR 16KB FLASH 20MHZ 32TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA168-20MQ](/photos/12/32/123211/atmega168-20mq_tmb.jpg)
Part Number:
Description:
IC MCU AVR 16K FLASH 32-QFN
Manufacturer:
Atmel
Datasheet: