DSPIC30F2012-30I/SP Microchip Technology, DSPIC30F2012-30I/SP Datasheet - Page 199

• Manufacturer Part Number: DSPIC30F2012-30I/SP
• Description: IC DSPIC MCU/DSP 12K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2012-30I/SP

• Program Memory Type: FLASH
• Program Memory Size: 12KB (4K x 24)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 12
• Data Ram Size: 1 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
• Minimum Operating Temperature: - 40 C
• Core Frequency: 30MHz
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F201230ISP

Internal Clock Timing Examples ....................................... 160
Internet Address................................................................ 200
Interrupt Controller
Interrupt Priority .................................................................. 66
Interrupt Sequence ............................................................. 69
Interrupts ............................................................................. 65
L
Load Conditions ................................................................ 157
Low Voltage Detect (LVD) ................................................ 131
Low-Voltage Detect Characteristics .................................. 154
LVDL Characteristics ........................................................ 154
M
Memory Organization.......................................................... 29
Microchip Internet Web Site .............................................. 200
Modulo Addressing ............................................................. 44
MPLAB ASM30 Assembler, Linker, Librarian ................... 144
MPLAB ICD 2 In-Circuit Debugger ................................... 145
MPLAB ICE 2000 High-Performance Universal
MPLAB Integrated Development Environment Software .. 143
MPLAB PM3 Device Programmer .................................... 145
MPLAB REAL ICE In-Circuit Emulator System................. 145
MPLINK Object Linker/MPLIB Object Librarian ................ 144
N
NVM
O
OC/PWM Module Timing Characteristics.......................... 169
Operating Current (I
Operating Frequency vs Voltage
Oscillator
Oscillator Selection ........................................................... 121
Oscillator Start-up Timer
Output Compare Interrupts ................................................. 89
Output Compare Module..................................................... 87
Output Compare Operation During CPU Idle Mode............ 89
Output Compare Sleep Mode Operation ............................ 89
© 2008 Microchip Technology Inc.
Register Map......................................................... 71, 72
Traps........................................................................... 67
Interrupt Stack Frame ................................................. 69
Core Register Map...................................................... 39
Applicability ................................................................. 46
Incrementing Buffer Operation Example..................... 45
Start and End Address................................................ 45
W Address Register Selection .................................... 45
In-Circuit Emulator .................................................... 145
Register Map............................................................... 53
dsPIC30FXXXX-20 (Extended)................................. 147
Configurations........................................................... 124
Operating Modes (Table) .......................................... 122
System Overview ...................................................... 121
Timing Characteristics .............................................. 163
Timing Requirements................................................ 163
Register Map............................................................... 90
Timing Characteristics .............................................. 168
Timing Requirements................................................ 168
Fail-Safe Clock Monitor .................................... 126
Fast RC (FRC) .................................................. 125
Initial Clock Source Selection ........................... 124
Low-Power RC (LPRC)..................................... 125
LP Oscillator Control ......................................... 125
Phase Locked Loop (PLL) ................................ 125
Start-up Timer (OST) ........................................ 124
DD
)..................................................... 149
dsPIC30F2011/2012/3012/3013
P
Packaging Information ...................................................... 185
Peripheral Module Disable (PMD) Registers .................... 133
PICSTART Plus Development Programmer..................... 146
Pinout Descriptions............................................................. 16
PLL Clock Timing Specifications ...................................... 159
POR. See Power-on Reset.
Port Write/Read Example ................................................... 60
PORTB
PORTC
PORTD
PORTF
Power Saving Modes........................................................ 131
Power-Down Current (I
Power-up Timer
Program Address Space..................................................... 29
Program and EEPROM Characteristics............................ 156
Program Counter ................................................................ 20
Programmable .................................................................. 121
Programmer’s Model .......................................................... 20
Programming Operations.................................................... 51
Protection Against Accidental Writes to OSCCON ........... 126
R
Reader Response............................................................. 201
Reset ........................................................................ 121, 127
Marking............................................................. 185, 186
Register Map for dsPIC30F2011/3012 ....................... 61
Register Map for dsPIC30F2012/3013 ....................... 61
Register Map for dsPIC30F2011/2012/3012/3013 ..... 61
Register Map for dsPIC30F2011/3012 ....................... 61
Register Map for dsPIC30F2012/3013 ....................... 62
Register Map for dsPIC30F2012/3013 ....................... 62
Idle............................................................................ 132
Sleep ........................................................................ 131
Sleep and Idle........................................................... 121
Timing Characteristics .............................................. 163
Timing Requirements ............................................... 163
Construction ............................................................... 31
Data Access from Program Memory
Data Access From Program Memory
Data Access from, Address Generation ..................... 31
Data Space Window into Operation ........................... 34
Data Table Access (LS Word) .................................... 32
Data Table Access (MS Byte) .................................... 33
Memory Map............................................................... 30
Table Instructions
Diagram ...................................................................... 21
Algorithm for Program Flash....................................... 51
Erasing a Row of Program Memory ........................... 51
Initiating the Programming Sequence ........................ 52
Loading Write Latches................................................ 52
BOR, Programmable ................................................ 129
Brown-out Reset (BOR)............................................ 121
Oscillator Start-up Timer (OST)................................ 121
POR
POR (Power-on Reset)............................................. 127
Using Program Space Visibility .......................... 33
Using Table Instructions ..................................... 32
TBLRDH ............................................................. 32
TBLRDL.............................................................. 32
TBLWTH............................................................. 32
TBLWTL ............................................................. 32
Operating without FSCM and PWRT................ 129
With Long Crystal Start-up Time ...................... 129
PD
)................................................ 151
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