PIC24FJ32GB002-I/SO Microchip Technology, PIC24FJ32GB002-I/SO Datasheet - Page 219

• Manufacturer Part Number: PIC24FJ32GB002-I/SO
• Description: IC MCU 16BIT 32KB FLASH 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ32GB002-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 32KB (11K x 24)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001, MA240019, DM240002, DM240011, DV164033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 18-12: U1CNFG1: USB CONFIGURATION REGISTER 1 (CONTINUED)
REGISTER 18-13: U1CNFG2: USB CONFIGURATION REGISTER 2
© 2009 Microchip Technology Inc.
bit 1-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
U-0
—
—
This bit is only active when the UTRDIS bit (U1CNFG2<0>) is set.
Never change these bits while the USBPWR bit is set (U1PWRC<0> = 1).
PPB<1:0>: Ping-Pong Buffers Configuration bit
11 = EVEN/ODD ping-pong buffers enabled for Endpoints 1 to 15
10 = EVEN/ODD ping-pong buffers enabled for all endpoints
01 = EVEN/ODD ping-pong buffer enabled for OUT Endpoint 0
00 = EVEN/ODD ping-pong buffers disabled
Unimplemented: Read as ‘0’
UVCMPSEL: External Comparator Input Mode Select bit (see Table 18-3)
When UVCMPDIS is set:
1 = Use 3 pin input for external comparators
0 = Use 2 pin input for external comparators
PUVBUS: V
1 = Pull-up on V
0 = Pull-up on V
EXTI2CEN: I
1 = External module(s) controlled via I
0 = External module(s) controller via dedicated pins
UVBUSDIS: On-Chip 5V Boost Regulator Builder Disable bit
1 = On-chip boost regulator builder disabled; digital output control interface enabled
0 = On-chip boost regulator builder active
UVCMPDIS: On-Chip V
1 = On-chip charge V
0 = On-chip charge V
UTRDIS: On-Chip Transceiver Disable bit
1 = On-chip transceiver disabled; digital transceiver interface enabled
0 = On-chip transceiver active
U-0
U-0
—
—
BUS
2
C™ Interface For External Module Control Enable bit
W = Writable bit
‘1’ = Bit is set
UVCMPSEL
Pull-up Enable bit
BUS
BUS
R/W-0
U-0
—
pin enabled
pin disabled
BUS
BUS
BUS
comparator disabled; digital input status interface enabled
comparator active
Comparator Disable bit
PUVBUS
R/W-0
U-0
PIC24FJ64GB004 FAMILY
—
Preliminary
2
C interface
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EXTI2CEN
R/W-0
U-0
—
(1)
UVBUSDIS
(1)
R/W-0
U-0
—
(1)
UVCMPDIS
x = Bit is unknown
R/W-0
U-0
—
DS39940C-page 217
(1)
UTRDIS
R/W-0
U-0
—
bit 8
bit 0
(1)