DSPIC33FJ12MC202-I/SO Microchip Technology, DSPIC33FJ12MC202-I/SO Datasheet - Page 59

• Manufacturer Part Number: DSPIC33FJ12MC202-I/SO
• Description: IC DSPIC MCU/DSP 12K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 12KB (12K x 8)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 1 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240002, DM330021, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164339 - MODULE SKT FOR PM3 28SOICDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 5-1:
TABLE 5-1:
© 2007 Microchip Technology Inc.
bit 1
bit 0
Note 1:
TRAPR (RCON<15>)
IOPUWR (RCON<14>)
CM (RCON<9>)
EXTR (RCON<7>)
SWR (RCON<6>)
WDTO (RCON<4>)
SLEEP (RCON<3>)
IDLE (RCON<2>)
BOR (RCON<1>
POR (RCON<0>)
Note:
2:
All Reset flag bits can be set or cleared by the user software.
All of the Reset status bits can be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting.
Flag Bit
BOR: Brown-out Reset Flag bit
1 = A Brown-out Reset has occurred
0 = A Brown-out Reset has not occurred
POR: Power-on Reset Flag bit
1 = A Power-up Reset has occurred
0 = A Power-up Reset has not occurred
RESET FLAG BIT OPERATION
RCON: RESET CONTROL REGISTER
Trap conflict event
Illegal opcode or uninitialized
W register access
Configuration mismatch
MCLR Reset
RESET instruction
WDT time-out
PWRSAV #SLEEP instruction
PWRSAV #IDLE instruction
BOR
POR
Preliminary
Setting Event
dsPIC33FJ12MC201/202
(1)
(CONTINUED)
POR, BOR
POR, BOR
POR, BOR
POR
POR, BOR
PWRSAV instruction, POR, BOR,
CLRWDT instruction
POR, BOR
POR, BOR
—
—
Clearing Event
DS70265B-page 57