PIC18F86J10-I/PT Microchip Technology, PIC18F86J10-I/PT Datasheet - Page 54

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PIC18F86J10-I/PT

Manufacturer Part Number
PIC18F86J10-I/PT
Description
IC PIC MCU FLASH 32KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F86J10-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
66
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 15x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
66
Ram Memory Size
2048Byte
Cpu Speed
40MHz
No. Of Timers
5
No. Of Pwm
RoHS Compliant
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM164120-5, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 15 Channel
Height
1 mm
Length
12 mm
Supply Voltage (max)
2.7 V, 3.6 V
Supply Voltage (min)
2 V, 2.7 V
Width
12 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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PIC18F87J10 FAMILY
5.6
Most registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. The other registers are forced to a “Reset
state” depending on the type of Reset that occurred.
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal
operation. Status bits from the RCON register, RI, TO,
PD, POR and BOR, are set or cleared differently in
different Reset situations, as indicated in Table 5-1.
These bits are used in software to determine the nature
of the Reset.
TABLE 5-1:
DS39663F-page 52
Power-on Reset
RESET Instruction
Brown-out
MCLR during power-managed
Run modes
MCLR during power-managed
Idle modes and Sleep mode
WDT time-out during full-power
or power-managed Run modes
MCLR during full-power
execution
Stack Full Reset (STVREN = 1)
Stack Underflow Reset
(STVREN = 1)
Stack Underflow Error (not an
actual Reset, STVREN = 0)
WDT time-out during
power-managed Idle or Sleep
modes
Interrupt exit from
power-managed modes
Legend: u = unchanged
Note 1:
Reset State of Registers
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (0008h or 0018h).
Condition
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
Counter
Program
PC + 2
PC + 2
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
(1)
RI
1
0
1
u
u
u
u
u
u
u
u
u
TO
1
u
1
1
1
0
u
u
u
u
0
u
RCON Register
Table 5-2 describes the Reset states for all of the
Special Function Registers. These are categorized by
Power-on and Brown-out Resets, Master Clear and
WDT Resets and WDT wake-ups.
PD
1
u
1
u
0
u
u
u
u
u
0
0
POR
0
u
u
u
u
u
u
u
u
u
u
u
BOR
© 2009 Microchip Technology Inc.
0
u
0
u
u
u
u
u
u
u
u
u
STKFUL
STKPTR Register
0
u
u
u
u
u
u
1
u
u
u
u
STKUNF
0
u
u
u
u
u
u
u
1
1
u
u

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