PIC18F86J10-I/PT Microchip Technology, PIC18F86J10-I/PT Datasheet - Page 375

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PIC18F86J10-I/PT

Manufacturer Part Number
PIC18F86J10-I/PT
Description
IC PIC MCU FLASH 32KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F86J10-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
66
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 15x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
66
Ram Memory Size
2048Byte
Cpu Speed
40MHz
No. Of Timers
5
No. Of Pwm
RoHS Compliant
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM164120-5, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 15 Channel
Height
1 mm
Length
12 mm
Supply Voltage (max)
2.7 V, 3.6 V
Supply Voltage (min)
2 V, 2.7 V
Width
12 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Quantity
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PIC18F86J10-I/PT
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Microchi
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FIGURE 27-13:
TABLE 27-16: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0)
© 2009 Microchip Technology Inc.
70
73
73A
74
75
76
78
79
80
Note 1:
Param
No.
(CKP = 0)
(CKP = 1)
SDIx
SSx
SCKx
SCKx
SDOx
Note:
T
T
T
T
T
T
T
T
T
T
T
T
T
SS
SS
SC
SC
SC
SC
SC
SC
DI
DI
B
DO
DO
Only if Parameter #71A and #72A are used.
Symbol
2
V2
V2
Refer to Figure 27-3 for load conditions.
L2
L2
H2
L2
R
F
H2
L2
B
R
F
SC
SC
SC
SC
DI
DO
DI
DO
L
L,
H,
L
H,
L
V
V,
EXAMPLE SPI MASTER MODE TIMING (CKE = 0)
SSx ↓ to SCKx ↓ or SCKx ↑ Input
Setup Time of SDIx Data Input to SCKx Edge
Last Clock Edge of Byte 1 to the 1st Clock Edge
of Byte 2
Hold Time of SDIx Data Input to SCKx Edge
SDOx Data Output Rise Time
SDOx Data Output Fall Time
SCKx Output Rise Time (Master mode)
SCKx Output Fall Time (Master mode)
SDOx Data Output Valid after SCKx Edge
70
80
71
73
MSb In
Characteristic
MSb
74
72
75, 76
bit 6 - - - - - - 1
bit 6 - - - - 1
PIC18F87J10 FAMILY
78
79
1.5 T
Min
T
CY
20
40
LSb
CY
79
78
LSb In
+ 40
Max Units
25
25
25
25
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS39663F-page 373
(Note 1)
Conditions

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