PIC18F86J10-I/PT Microchip Technology, PIC18F86J10-I/PT Datasheet - Page 400

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PIC18F86J10-I/PT

Manufacturer Part Number
PIC18F86J10-I/PT
Description
IC PIC MCU FLASH 32KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F86J10-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
66
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 15x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
66
Ram Memory Size
2048Byte
Cpu Speed
40MHz
No. Of Timers
5
No. Of Pwm
RoHS Compliant
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM164120-5, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 15 Channel
Height
1 mm
Length
12 mm
Supply Voltage (max)
2.7 V, 3.6 V
Supply Voltage (min)
2 V, 2.7 V
Width
12 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
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Manufacturer
Quantity
Price
Part Number:
PIC18F86J10-I/PT
Manufacturer:
Microchi
Quantity:
354
Part Number:
PIC18F86J10-I/PT
Manufacturer:
MICROCHIP
Quantity:
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Part Number:
PIC18F86J10-I/PT
Manufacturer:
Microchip Technology
Quantity:
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PIC18F87J10 FAMILY
FSCM. See Fail-Safe Clock Monitor.
G
GOTO ............................................................................... 314
H
Hardware Multiplier .......................................................... 107
Hardware Various Multiply
I
I/O Ports ........................................................................... 125
I
INCF ................................................................................. 314
INCFSZ ............................................................................ 315
In-Circuit Debugger .......................................................... 292
DS39663F-page 398
2
C Mode (MSSP)
Erase Sequence ........................................................ 90
Erasing ....................................................................... 90
Operation During Code-Protect ................................. 93
Reading ...................................................................... 89
Table Pointer
Table Pointer Boundaries .......................................... 88
Table Reads and Table Writes .................................. 85
Write Sequence ......................................................... 91
Writing ........................................................................ 91
Introduction .............................................................. 107
Operation ................................................................. 107
Performance Comparisons ...................................... 107
Pin Capabilities ........................................................ 125
Acknowledge Sequence Timing ............................... 232
Associated Registers ............................................... 238
Baud Rate Generator ............................................... 225
Bus Collision
Clock Arbitration ....................................................... 226
Clock Stretching ....................................................... 218
Clock Synchronization and the CKP bit ................... 219
Effects of a Reset ..................................................... 233
General Call Address Support ................................. 222
I
Master Mode ............................................................ 223
Multi-Master Communication, Bus Collision
Multi-Master Mode ................................................... 233
Operation ................................................................. 209
Read/Write Bit Information (R/W Bit) ............... 209, 211
Registers .................................................................. 203
Serial Clock (RC3/SCKx/SCLx) ............................... 211
Slave Mode .............................................................. 209
Sleep Operation ....................................................... 233
Stop Condition Timing .............................................. 232
2
C Clock Rate w/BRG ............................................. 225
Boundaries Based on Operation ........................ 88
Unexpected Termination .................................... 93
Write Verify ........................................................ 93
During a Repeated Start Condition .................. 236
During a Stop Condition ................................... 237
10-Bit Slave Receive Mode (SEN = 1) ............. 218
10-Bit Slave Transmit Mode ............................. 218
7-Bit Slave Receive Mode (SEN = 1) ............... 218
7-Bit Slave Transmit Mode ............................... 218
Operation ......................................................... 224
Reception ......................................................... 229
Repeated Start Condition Timing ..................... 228
Start Condition Timing ..................................... 227
Transmission .................................................... 229
and Arbitration .................................................. 233
Addressing ....................................................... 209
Reception ......................................................... 211
Transmission .................................................... 211
In-Circuit Serial Programming (ICSP) ...................... 281, 292
Indexed Literal Offset Addressing
Indexed Literal Offset Mode ............................................. 340
Indirect Addressing ............................................................ 79
INFSNZ ............................................................................ 315
Initialization Conditions for all Registers ...................... 53–57
Instruction Cycle ................................................................ 66
Instruction Set .................................................................. 293
and Standard PIC18 Instructions ............................. 340
Clocking Scheme ....................................................... 66
Flow/Pipelining ........................................................... 66
ADDLW .................................................................... 299
ADDWF .................................................................... 299
ADDWF (Indexed Literal Offset Mode) .................... 341
ADDWFC ................................................................. 300
ANDLW .................................................................... 300
ANDWF .................................................................... 301
BC ............................................................................ 301
BCF ......................................................................... 302
BN ............................................................................ 302
BNC ......................................................................... 303
BNN ......................................................................... 303
BNOV ...................................................................... 304
BNZ ......................................................................... 304
BOV ......................................................................... 307
BRA ......................................................................... 305
BSF .......................................................................... 305
BSF (Indexed Literal Offset Mode) .......................... 341
BTFSC ..................................................................... 306
BTFSS ..................................................................... 306
BTG ......................................................................... 307
BZ ............................................................................ 308
CALL ........................................................................ 308
CLRF ....................................................................... 309
CLRWDT ................................................................. 309
COMF ...................................................................... 310
CPFSEQ .................................................................. 310
CPFSGT .................................................................. 311
CPFSLT ................................................................... 311
DAW ........................................................................ 312
DCFSNZ .................................................................. 313
DECF ....................................................................... 312
DECFSZ .................................................................. 313
Extended Instructions .............................................. 335
General Format ........................................................ 295
GOTO ...................................................................... 314
INCF ........................................................................ 314
INCFSZ .................................................................... 315
INFSNZ .................................................................... 315
IORLW ..................................................................... 316
IORWF ..................................................................... 316
LFSR ....................................................................... 317
MOVF ...................................................................... 317
MOVFF .................................................................... 318
MOVLB .................................................................... 318
MOVLW ................................................................... 319
MOVWF ................................................................... 319
MULLW .................................................................... 320
MULWF .................................................................... 320
NEGF ....................................................................... 321
NOP ......................................................................... 321
Opcode Field Descriptions ....................................... 294
Considerations when Enabling ........................ 340
Syntax .............................................................. 335
Use with MPLAB IDE Tools ............................. 342
© 2009 Microchip Technology Inc.

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