PIC16F872-I/SO Microchip Technology, PIC16F872-I/SO Datasheet - Page 11

• Manufacturer Part Number: PIC16F872-I/SO
• Description: IC MCU FLASH 2KX14 EE 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F872-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Eeprom Size: 64 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C/SPI/SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.2.2
The Special Function Registers are registers used by
the CPU and peripheral modules for controlling the
desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Table 2-1.
TABLE 2-1:
© 2006 Microchip Technology Inc.
Address
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0', r = reserved.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents are
Bank 0
(2)
(2)
(2)
(2)
(1,2)
(2)
2: These registers can be addressed from any bank.
3: These bits are reserved; always maintain these bits clear.
SSPCON
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
CCPR1L
CCPR1H
CCP1CON
ADRESH
ADCON0
Shaded locations are unimplemented, read as ‘0’.
transferred to the upper byte of the program counter.
SPECIAL FUNCTION REGISTERS
Name
—
—
—
—
—
—
—
—
SPECIAL FUNCTION REGISTER SUMMARY
Addressing this location uses contents of FSR to address data memory
(not a physical register)
Timer0 Module Register
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address Pointer
PORTB Data Latch when written: PORTB pins when read
PORTC Data Latch when written: PORTC pins when read
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Synchronous Serial Port Receive Buffer/Transmit Register
Capture/Compare/PWM Register1 (LSB)
Capture/Compare/PWM Register1 (MSB)
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
A/D Result Register High Byte
ADCS1
WCOL
Bit 7
IRP
GIE
(3)
—
—
—
—
—
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 43, 94
SSPOV
ADCS0
PEIE
ADIF
Bit 6
RP1
(3)
—
—
—
—
PORTA Data Latch when written: PORTA pins when read
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 39, 94
TMR0IE
SSPEN
CCP1X
CHS2
Bit 5
RP0
(3)
—
—
Write Buffer for the upper 5 bits of the Program Counter ---0 0000 20, 93
CCP1Y
CHS1
INTE
EEIF
Bit 4
CKP
TO
(3)
The Special Function Registers can be classified into
two sets: core (CPU) and peripheral. Those registers
associated with the core functions are described in
detail in this section. Those related to the operation of
the peripheral features are described in detail in the
peripheral feature section.
CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 45, 94
SSPM3
SSPIF
BCLIF
CHS0
RBIE
Bit 3
PD
TMR0IF
CCP1IF
SSPM2
DONE
Bit 2
GO/
—
Z
TMR2IF
SSPM1
INTF
Bit 1
DC
—
—
PIC16F872
TMR1IF r0rr 0000 16, 93
SSPM0
ADON
RBIF
Bit 0
(3)
C
DS30221C-page 9
0000 0000 21, 93
xxxx xxxx 35, 93
0000 0000 20, 93
0001 1xxx 12, 93
xxxx xxxx 21, 93
--0x 0000 29, 93
xxxx xxxx 31, 93
xxxx xxxx 33, 93
0000 000x 14, 93
-r-0 0--r 18, 93
xxxx xxxx 40, 94
xxxx xxxx 40, 94
0000 0000 43, 94
xxxx xxxx 55, 94
0000 0000 53, 94
xxxx xxxx 45, 94
xxxx xxxx 45, 94
xxxx xxxx 84, 94
0000 00-0 79, 94
Value on:
POR,
BOR
—
—
—
—
—
—
—
—
Details
page:
on
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