PIC18F66J15-I/PT Microchip Technology, PIC18F66J15-I/PT Datasheet - Page 4

• Manufacturer Part Number: PIC18F66J15-I/PT
• Description: IC PIC MCU FLASH 48KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F66J15-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 96KB (48K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10 FAMILY
8. Module: MSSP
9. Module: MSSP
TABLE 2:
DS80246B-page 4
Param
A06A
A06
No.
It has been observed that following a Power-on
Reset, I
just configuring the SCLx and SDAx pins as either
inputs or outputs. This has only been seen in a few
unique system environments.
A test of a statistically significant sample of pre-
production systems, across the voltage and
current range of the application’s power supply,
should indicate if a system is susceptible to this
issue.
Work around
Before configuring the module for I
1. Configure the SCLx and SDAx pins as outputs
2. Force SCLx and SDAx low by clearing the
3. While keeping the LAT bits clear, configure
Once this is done, use the SSPxCON1 and
SSPxCON2 registers to configure the proper I
mode as before.
Date Codes that pertain to this issue:
All engineering and production devices.
When the MSSP peripherals are configured for
SPI mode, the Buffer Full bit, BF (SSPxSTAT<0>),
should not be polled in software to determine when
the transfer is complete.
Work around
Copy the SSPxSTAT register into a variable and
perform the bit test on the variable. In Example 3,
SSP1STAT is copied into the working register
where the bit test is performed.
by clearing their corresponding TRIS bits.
corresponding LAT bits.
SCLx and SDAx as inputs by setting their TRIS
bits.
E
E
Symbol
OFF
OFF
2
C modes may not initialize properly by
A/D CONVERTER CHARACTERISTICS: PIC18F87J10 FAMILY (INDUSTRIAL)
Offset Error
Offset Error
Characteristic
2
C operation:
2
Min
C
—
—
EXAMPLE 3:
10. Module: A/D
Typ
—
—
A second option is to poll the Master Synchronous
Serial Port Interrupt Flag bit, SSP1IF (PIR1<3>).
This bit can be polled and will set when the transfer
is complete.
Date Codes that pertain to this issue:
All engineering and production devices.
The A/D offset is greater than the specified limit in
Table 26-26 of the Device Data Sheet. The
updated conditions and limits are shown in bold
text in Table 2.
Work around
Three work arounds exist.
1. Configure the A/D to use the V
2. Perform a conversion on a known voltage
3. Increase system clock speed to 40 MHz and
Date Codes that pertain to this issue:
All engineering and production devices.
loop_MSB:
pins for the voltage references. This is done by
setting the VCFG<1:0> bits (ADCON1<5:4>).
reference voltage and adjust the A/D result in
software.
adjust A/D settings accordingly. Higher system
clock frequencies decrease offset error.
MOVF
BTFSS WREG, BF
BRA
<±5.0
<±5.0
Max
SSP1STAT, W
loop_MSB
MSSP1
Units
LSb
LSb
© 2006 Microchip Technology Inc.
V
V
REF
REF
= V
= V
Conditions
REF
SS
REF
and V
+ and V
+ and V
DD
REF
REF
-
-