PIC16C711-04/P Microchip Technology, PIC16C711-04/P Datasheet - Page 73

• Manufacturer Part Number: PIC16C711-04/P
• Description: IC MCU OTP 1KX14 A/D 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C711-04/P

• Program Memory Type: OTP
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 13
• Ram Size: 68 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 68 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 4-ch x 8-bit
• Package: 18PDIP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 4 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
1997 Microchip Technology Inc.
If Skip:
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
None
If bit 'b' in register 'f' is '0' then the next
instruction is executed.
If bit 'b' is '1', then the next instruction is
discarded and a NOP is executed
instead, making this a 2T
1
1(2)
Before Instruction
After Instruction
(2nd Cycle)
Decode
HERE
FALSE
TRUE
NOP
Q1
Q1
01
f
b < 7
127
PC =
if FLAG<1> = 0,
PC =
if FLAG<1> = 1,
PC =
register 'f'
11bb
BTFSC
GOTO
•
•
•
Read
NOP
Q2
Q2
address HERE
address FALSE
address TRUE
FLAG,1
PROCESS_CODE
Process
bfff
NOP
data
Q3
Q3
CY
instruction.
ffff
NOP
NOP
Q4
Q4
CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
2nd Cycle
1st Cycle
Call Subroutine
[ label ] CALL k
0
(PC)+ 1
k
(PCLATH<4:3>)
None
Call Subroutine. First, return address
(PC+1) is pushed onto the stack. The
eleven bit immediate address is loaded
into PC bits <10:0>. The upper bits of
the PC are loaded from PCLATH.
CALL is a two cycle instruction.
1
2
Before Instruction
After Instruction
Decode
HERE
NOP
Q1
10
k
PC<10:0>,
PIC16C71X
2047
PC = Address HERE
PC = Address THERE
TOS = Address HERE+1
Push PC
literal 'k',
to Stack
TOS,
0kkk
CALL
Read
NOP
Q2
DS30272A-page 73
THERE
Process
kkkk
PC<12:11>
NOP
data
Q3
Write to
kkkk
NOP
Q4
PC