PIC16C711-04/P Microchip Technology, PIC16C711-04/P Datasheet - Page 40

• Manufacturer Part Number: PIC16C711-04/P
• Description: IC MCU OTP 1KX14 A/D 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C711-04/P

• Program Memory Type: OTP
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 13
• Ram Size: 68 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 68 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 4-ch x 8-bit
• Package: 18PDIP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 4 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16C71X
7.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 7-5. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
impedance varies over the device voltage (V
Figure 7-5. The source impedance affects the offset
voltage at the analog input (due to pin leakage current).
The maximum recommended impedance for ana-
log sources is 10 k . After the analog input channel is
selected (changed) this acquisition must be done
before the conversion can be started.
To calculate the minimum acquisition time, Equation 7-
1 may be used. This equation calculates the acquisition
time to within 1/2 LSb error is used (512 steps for the
A/D). The 1/2 LSb error is the maximum error allowed
for the A/D to meet its specified accuracy.
EQUATION 7-1:
V
Given: V
The above equation reduces to:
T
Example 7-1 shows the calculation of the minimum
required acquisition time T
based on the following system assumptions.
C
Rs = 10 k
1/2 LSb error
V
Temp (application system max.) = 50 C
V
FIGURE 7-5:
DS30272A-page 40
HOLD
CAP
DD
HOLD
HOLD
= 5V
= -(51.2 pF)(1 k + R
= (V
= 51.2 pF
= 0 @ t = 0
HOLD
A/D Acquisition Requirements
REF
= (V
Rss = 7 k
- (V
S
) and the internal sampling switch (R
REF
REF
HOLD
ANALOG INPUT MODEL
Legend C
/512), for 1/2 LSb resolution
/512)) • (1 - e
VA
. The sampling switch (R
A/D MINIMUM CHARGING
TIME
SS
Rs
V
I leakage
R
SS
C
T
PIN
IC
HOLD
+ R
ACQ
ANx
S
C
5 pF
(-T
HOLD
) ln(1/511)
PIN
. This calculation is
CAP
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
/C
) must be allowed
HOLD
(R
IC
+ R
V
DD
SS
V
V
+ R
T
DD
T
SS
SS
= 0.6V
= 0.6V
S
))
),
)
)
)
I leakage
500 nA
EXAMPLE 7-1:
T
T
T
T
R
ACQ
ACQ
CAP
ACQ
IC
Note 1: The reference voltage (V
Note 2: The charge holding capacitor (C
Note 3: The maximum recommended impedance
Note 4: After a conversion has completed, a
= -C
1k
= Amplifier Settling Time +
= 5 s + T
= 5 s + 5.747 s + [(50 C - 25 C)(0.05 s/ C)]
Holding Capacitor Charging Time +
Temperature Coefficient
-51.2 pF (1 k + 7 k + 10 k ) ln(0.0020)
-51.2 pF (18 k ) ln(0.0020)
-0.921 s (-6.2364)
5.747 s
10.747 s + 1.25 s
11.997 s
V
SS R
DD
HOLD
Sampling
Switch
effect on the equation, since it cancels
itself out.
not discharged after each conversion.
for analog sources is 10 k . This is
required to meet the pin leakage specifi-
cation.
2.0T
sition can begin again. During this time the
holding capacitor is not connected to the
selected A/D input channel.
6V
5V
4V
3V
2V
SS
AD
(R
CAP
IC
delay must complete before acqui-
CALCULATING THE
MINIMUM REQUIRED
AQUISITION TIME
Sampling Switch
5 6 7 8 9 10 11
+ [(Temp - 25 C)(0.05 s/ C)]
+ R
V
SS
C
= DAC capacitance
= 51.2 pF
( k )
SS
HOLD
1997 Microchip Technology Inc.
+ R
S
) ln(1/511)
REF
) has no
HOLD
) is