PIC18F26K20-E/SS Microchip Technology, PIC18F26K20-E/SS Datasheet - Page 450
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PIC18F26K20-E/SS
Manufacturer Part Number
PIC18F26K20-E/SS
Description
IC PIC MCU FLASH 32KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(456 pages)
3.PIC18F26K20-ISS.pdf
(6 pages)
4.PIC18F26K20-ISS.pdf
(10 pages)
5.PIC18F26K20-EML.pdf
(430 pages)
Specifications of PIC18F26K20-E/SS
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1024Byte
Ram Memory Size
3.84375KB
Cpu Speed
64MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
CCP, ECCP, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
28SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F26K20-E/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2XK20/4XK20
RESET ............................................................................. 345
Reset State of Registers .................................................... 58
Resets ........................................................................ 51, 299
RETFIE ............................................................................ 346
RETLW ............................................................................. 346
RETURN .......................................................................... 347
Return Address Stack ........................................................ 66
Return Stack Pointer (STKPTR) ........................................ 67
Revision History ............................................................... 441
RLCF ................................................................................ 347
RLNCF ............................................................................. 348
RRCF ............................................................................... 348
RRNCF ............................................................................. 349
S
SCK .................................................................................. 193
SDI ................................................................................... 193
SDO ................................................................................. 193
SEC_IDLE Mode ................................................................ 47
SEC_RUN Mode ................................................................ 44
Serial Clock, SCK ............................................................. 193
Serial Data In (SDI) .......................................................... 193
Serial Data Out (SDO) ..................................................... 193
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 349
Shoot-through Current ..................................................... 185
Single-Supply ICSP Programming.
Slave Select (SS) ............................................................. 193
Slave Select Synchronization ........................................... 199
SLEEP .............................................................................. 350
Sleep
Sleep Mode ........................................................................ 45
Slew Rate ......................................................................... 138
SLRCON Register ............................................................ 138
Software Simulator (MPLAB SIM) .................................... 367
SPBRG ............................................................................. 249
SPBRGH .......................................................................... 249
DS41303G-page 450
PIR1 (Peripheral Interrupt Request 1) ..................... 112
PIR2 (Peripheral Interrupt Request 2) ..................... 113
PSTRCON (Pulse Steering Control) ........................ 187
PWM1CON (Enhanced PWM Control) .................... 186
RCON (Reset Control) ....................................... 52, 118
RCON (Reset control) .............................................. 118
RCSTA (Receive Status and Control) ...................... 247
SLRCON (PORT Slew Rate Control) ....................... 138
SSPADD (MSSP Address and Baud Rate,
SSPCON1 (MSSP Control 1, I
SSPCON1 (MSSP Control 1, SPI Mode) ................. 195
SSPCON2 (MSSP Control 2, I
SSPMSK (SSP Mask) .............................................. 213
SSPSTAT (MSSP Status, SPI Mode) .............. 194, 204
STATUS ..................................................................... 82
STKPTR (Stack Pointer) ............................................ 67
T0CON (Timer0 Control) .......................................... 155
T1CON (Timer1 Control) .......................................... 159
T2CON (Timer2 Control) .......................................... 167
T3CON (Timer3 Control) .......................................... 169
TRISE (PORTE/PSP Control) .................................. 134
TXSTA (Transmit Status and Control) ..................... 246
WDTCON (Watchdog Timer Control) ....................... 309
Brown-out Reset (BOR) ........................................... 299
Oscillator Start-up Timer (OST) ............................... 299
Power-on Reset (POR) ............................................ 299
Power-up Timer (PWRT) ......................................... 299
OSC1 and OSC2 Pin States ...................................... 36
SPI Mode) ........................................................ 203
2
2
C Mode) ................. 205
C Mode) ................. 206
Special Event Trigger ...................................................... 269
Special Event Trigger. See Compare (ECCP Mode).
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ........................................... 299
Special Function Registers ................................................ 77
SPI Mode (MSSP)
SS .................................................................................... 193
SSPADD Register ............................................................ 203
SSPCON1 Register ................................................. 195, 205
SSPCON2 Register ......................................................... 206
SSPMSK Register ........................................................... 213
SSPOV ............................................................................ 225
SSPOV Status Flag ......................................................... 225
SSPSTAT Register .................................................. 194, 204
Stack Full/Underflow Resets .............................................. 68
Standard Instructions ....................................................... 315
STATUS Register .............................................................. 82
STKPTR Register .............................................................. 67
SUBFSR .......................................................................... 361
SUBFWB ......................................................................... 350
SUBLW ............................................................................ 351
SUBULNK ........................................................................ 361
SUBWF ............................................................................ 351
SUBWFB ......................................................................... 352
SWAPF ............................................................................ 352
T
T0CON Register .............................................................. 155
T1CON Register .............................................................. 159
T2CON Register .............................................................. 167
T3CON Register .............................................................. 169
Table Pointer Operations (table) ........................................ 92
Table Reads/Table Writes ................................................. 68
TBLRD ............................................................................. 353
TBLWT ............................................................................. 354
Time-out in Various Situations (table) ................................ 55
Timer0 .............................................................................. 155
Map ............................................................................ 78
Associated Registers ............................................... 201
Bus Mode Compatibility ........................................... 201
Effects of a Reset .................................................... 201
Enabling SPI I/O ...................................................... 197
Master Mode ............................................................ 198
Master/Slave Connection ......................................... 197
Operation ................................................................. 196
Operation in Power Managed Modes ...................... 201
Serial Clock .............................................................. 193
Serial Data In ........................................................... 193
Serial Data Out ........................................................ 193
Slave Mode .............................................................. 199
Slave Select ............................................................. 193
Slave Select Synchronization .................................. 199
SPI Clock ................................................................. 198
Typical Connection .................................................. 197
R/W Bit ............................................................ 207, 208
Associated Registers ............................................... 157
Operation ................................................................. 156
Overflow Interrupt .................................................... 157
Prescaler ................................................................. 157
Prescaler Assignment (PSA Bit) .............................. 157
Prescaler Select (T0PS2:T0PS0 Bits) ..................... 157
Prescaler. See Prescaler, Timer0.
Reads and Writes in 16-Bit Mode ............................ 156
Source Edge Select (T0SE Bit) ............................... 156
Source Select (T0CS Bit) ......................................... 156
Switching Prescaler Assignment ............................. 157
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