PIC16F72-I/ML Microchip Technology, PIC16F72-I/ML Datasheet - Page 103
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PIC16F72-I/ML
Manufacturer Part Number
PIC16F72-I/ML
Description
IC PIC MCU FLASH 2KX14 28-QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F72-ISO.pdf
(136 pages)
5.PIC16F72-ISO.pdf
(6 pages)
6.PIC16F72-ISO.pdf
(136 pages)
Specifications of PIC16F72-I/ML
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
22
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16F72-I/MLR
PIC16F72-I/MLR
PIC16F72-I/MLR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
TABLE 14-6:
FIGURE 14-14:
© 2007 Microchip Technology Inc.
Param
No.
SCL
70*
71*
72*
73*
74*
75*
76*
77*
78*
79*
80*
81*
82*
83*
SDA
Note: Refer to Figure 14-3 for load conditions.
*
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscR
TscF
TscH2doV,
TscL2doV
TdoV2scH,
TdoV2scL
TssL2doV
TscH2ssH,
TscL2ssH
These parameters are characterized but not tested.
only and are not tested.
Symbol
SPI MODE REQUIREMENTS
90
Condition
SS↓ to SCK↓ or SCK↑ input
SCK input high time (Slave mode)
SCK input low time (Slave mode)
Setup time of SDI data input to SCK edge
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SS↑ to SDO output hi-impedance
SCK output rise time
(Master mode)
SCK output fall time (Master mode)
SDO data output valid after
SCK edge
SDO data output setup to SCK edge
SDO data output valid after SS↓ edge
SS ↑ after SCK edge
I
2
START
C BUS START/STOP BITS TIMING
91
Characteristic
Standard(F)
Extended(LF)
Standard(F)
Extended(LF)
Standard(F)
Extended(LF)
1.5 T
T
T
CY
CY
Min
T
100
100
T
10
—
CY
—
—
—
—
—
—
—
—
CY
CY
+ 20
+ 20
+ 40
Typ†
92
—
—
—
10
25
10
—
10
25
10
—
—
—
—
—
—
—
Condition
STOP
Max Units Conditions
PIC16F72
145
25
50
25
50
25
50
25
50
50
—
—
—
—
—
—
—
93
DS39597C-page 101
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns